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80 MSPS, Dual-Channel, WCDMA Receive Signal Processor (RSP)
Analog Devices Inc.
Description
The AD6634 is a two channel (dual) digital Receive Signal Processor (RSP) with four cascaded signal-processing elements: a frequency translator, two fixed-coefficient decimating filters, and a...
Features
80 MSPS Wide Band Inputs (14 Linear Bit Plus 3 RSSI) Two WCDMA-Digital Receivers In Single Package 16-Bit Parallel Outputs Digital AGC Output Bits for RAKE Receiver Digital Re-Sampling For Non-Integer Decimation Rates Programmable Decimating FIR Filters Flexible Control For Multi-Carrier And Phased Array Programmable Attenuator Control for Clip Prevention And External Gain Ranging Via Level Indicator 3.3 Volt I/O, 2.5 Volt CMOS Core User Configurable Built In Self Test (BIST) Capability JTAG Boundary Scan 156 pin BGA Package
Related Datasheets
| Part Number | Description | Category |
| • AD6620 | 65MSPS Digital Receive Signal Processor | ICs, Power Management |
| • AD6622 | 65 MSPS, Quad Transmit Signal Processor (TSP) | ICs, Power Management |
| • AD6623 | 104 MSPS, Four-Channel Digital Transmit Signal Processor (TSP) | ICs, Power Management |
| • AD6624 | 80 MSPS, Quad Receiver Signal Processor | ICs, Power Management |
| • AD6624A | Four-Channel, 100 MSPS Digital Receive Signal Processor (RSP) | ICs, Power Management |
| • AD6633 | Multi-channel (Digital) Transmit Signal Processor (TSP) with VersaCREST? Crest Reduction Engine | ICs, Power Management |
| • AD6634 | 80 MSPS, Dual-Channel, WCDMA Receive Signal Processor (RSP) | ICs, Power Management |
| • AD6635 | Four-Channel, 80 MSPS WCDMA Receive Signal Processor (RSP) | ICs, Power Management |
| • AD6636 | 150 MSPS Wideband (Digital) Receive Signal Processor (RSP) | ICs, Power Management |
| • AD6652 | 12-Bit, 65 MSPS IF to Base Band Diversity Receiver | ICs, Power Management |
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