Receive Path Includes Dual 10-Bit Analog-To-Digital Converters with Internal or External Reference, 50 And 80 MSPS Versions Transmit Path Includes Dual 10-Bit, 200 MSPS Digital-to-Analog Converters with 1x, 2x, Or 4x Interpolation and Programmable Gain Control Internal Clock Distribution Block Includes a Programmable Phase-Locked-Loop and Timing Generation Circuitry Allowing Single Reference Clock Operation 20-Bit Flexible I/O Data Interface Allow Various Interleaved or Non-Interleaved Data Transfers in Half-Duplex Mode and Interleaved Data Transfers in Full-Duplex Mode Configurable through SPI Compliant Port or MODE Selection Pins Independent Rx and Tx Powerdown Control Pins 64 Lead lfCSP Package (9 mm x 9 mm Footprint) 3 Configurable Auxiliary Converter Pins