CD4011UB TYPES (Rev. D)
Texas Instruments
Description
CD4011UB quad 2-input NAND gate provides the system designer with direct implementation of the NAND function and supplements the existing family of CMOS gates. The CD4011UB types are supplied in 14-lead hermetic dual-in-line ceramic packages (F3A suffix), 14-lead dual-in-line plastic packages (E suffix), 14-lead small-outline package (M, MT, M96, NSR suffixes), and 14-lead thin shrink small-outline packages (PW and PWR suffixes).
Features
Propagation delay time = 30 ns (typ). at CL = 50 pF, VDD = 10 V Standardized symmetrical output characteristics 100% tested for quiescent current at 20V Maximum input current of 1 µA at 18 V over full package temperature range; 100nA at 18 V and 25°C 5-V, 10-V, and 15-V parametric ratings Meets all requirements of JEDEC Tentative Standard No. 13B "Standard Specifications for Description of B Series CMOS Devices" Data sheet acquired from Harris Semiconductor
Related Datasheets
| Part Number | Description | Category |
| CD4007UB | CD4007UB TYPES (Rev. C) | EDA - IC Design |
| CD4011B | CD4011B, CD4012B, CD4023B TYPES (Rev. D) | EDA - IC Design |
| CD4093B | CD4093B Types (Rev. D) | EDA - IC Design |
As the hyperlinked contents/websites are those of third parties, we cannot vouch for their accuracy or legitimacy.
Hot Articles
Most Popular Articles
Search EE Times India
Max's Cool Beans
Strange modes of transport and other "stuff"
Someone just pointed me at a YouTube video that claims to show the world's first e-powered multicopter flight...












