Global Sources
EE Times-India
 
 


( File format: PDF, 269 Kbytes )
LVDS Quad CMOS Differential Line Driver
National Semiconductor

Description
The is a quad CMOS differential line driver designed for applications requiring ultra low power dissipation and high data rates. The device is designed to support data rates in excess of 155.5 Mbps (77.7 MHz) utilizing Low Voltage Differential Signaling (LVDS) technology. The accepts TTL/CMOS input levels and translates them to low voltage (350 mV) differential output signals. In addition the driver supports a TRI-STATE function that may be used to disable the output stage, disabling the load current, and thus dropping the device to an ultra low idle power state of 11 mW typical. The and companion line receiver (DS90C032) provide a new alternative to high power psuedo-ECL devices for high speed point-to-point interface applications.
Features

 • >155.5 Mbps (77.7 MHz) switching rates
 • ±350 mV differential signaling
 • Ultra low power dissipation
 • 400 ps maximum differential skew (5V, 25°C)
 • 3.5 ns maximum propagation delay
 • Industrial operating temperature range
 • Military operating temperature range option
 • Available in surface mount packaging (SOIC) and (LCC)
 • Pin compatible with DS26C31, MB571 (PECL) and 41LG (PECL)
 • Compatible with IEEE 1596.3 SCI LVDS standard
 • Conforms to ANSI/TIA/EIA-644 LVDS standard
 • Available to Standard Microcircuit Drawing (SMD) 5962-95833




As the hyperlinked contents/websites are those of third parties, we cannot vouch for their accuracy or legitimacy.
Max's Cool Beans

Clive Maxfield Strange modes of transport and other "stuff"

Someone just pointed me at a YouTube video that claims to show the world's first e-powered multicopter flight...

 

Go to top             Connect on Facebook      Follow us on Twitter      Follow us on Orkut