100 MHz M-LVDS Line Driver/Receiver Pair
National Semiconductor
Description
The DS91D180 and DS91C180 are 100 MHz M-LVDS (Multipoint Low Voltage Differential Signaling) line driver/receiver pairs designed for applications that utilize multipoint networks (e.g. clock distribution in ATCA and uTCA based systems). M-LVDS is a new bus interface standard (TIA/EIA-899) optimized for multidrop networks. Controlled edge rates, tight input receiver tresholds and increased drive strength are one of the key enhencments that make M-LVDS devices an ideal choice for distributing signals via multipoint networks. The DS91D180/DS91C180 driver input accepts LVTTL/LVCMOS signals and converts them to differential M-LVDS signal levels. The DS91D180/DS91C180 receiver accepts low voltage differential signals (LVDS, B-LVDS, M-LVDS, LV-PECL and CML) and converts them to 3V LVCMOS signals. The DS91D180 device has a M-LVDS type 1 receiver input with no offset.The DS91C180 device has a type 2 receiver input which enable failsafe functionality.
Features
DC to 100+ MHz / 200+ Mbps low power, low EMI operation
Optimal for ATCA, uTCA clock distribution networks
Meets or exceeds TIA/EIA-899 M-LVDS Standard
Wide Input Common Mode Voltage for Increased Noise Immunity
DS91D180 has type 1 receiver input
DS91C180 has type 2 receiver input for fail-safe functionality
Industrial temperature range
Space saving SOIC-14 package (JEDEC MS-012)
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