Electronics Design & EDA Tools [EDA/IP/Application Notes][Page 11]

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Application Notes (Sorted By Date)

Running two different versions of Master Designer on the same computer (30/05/01)
Specctra V8.00 node locked installation for Windows NT 4.0 (30/05/01)
Task swapping graphic problem in Windows (30/05/01)
Specctra 8.0 installation troubleshooting guide (30/05/01)
Specctra V8.00 node locked installation for Windows 98 (30/05/01)

How to make padstacks flip with SMD parts (30/05/01)
Using page connectors (30/05/01)
Printing padstack information on a Unix station using query/padstack (30/05/01)
Specctra V8.00 node locked installation for Windows 95 (30/05/01)
Running ECO forward annotation from the command line (30/05/01)

Using RS-274X format (30/05/01)
Using custom solder dots in schematic (30/05/01)
Importing OrCAD schematic netlist into P-CAD.doc (30/05/01)
Creating mounting holes (29/05/01)
How to clear Flash (29/05/01)

Creating non-homogeneous parts and symbols (29/05/01)
Generating return stringers (29/05/01)
Updating value fields in a schematic design (29/05/01)
Component pin code convention (29/05/01)
Creating an external aperture file using an internal aperture file (29/05/01)

Creating an edge connector as a through-hole part (29/05/01)
Database version and master designer version (29/05/01)
The exception file in PDIF file reader (29/05/01)
Barebone configuration files to run P-CAD (29/05/01)
SPECCTRA V9.0 node locked installation for Windows (29/05/01)

Deleting layers using PDIF and block save (29/05/01)
Using and understanding ports (28/05/01)
Displaying alternate views of a symbol (28/05/01)
Adding pins to an existing part file using PDIF (28/05/01)
ACCEL-To-SPECCTRA interface and design language translation (28/05/01)

Hierarchical hints (28/05/01)
Storing a view (28/05/01)
Library creation from ACCEL ASCII netlist (28/05/01)
Removing ERC and DRC error indicators (28/05/01)
Importing text from a file into ACCEL SCH or PCB (28/05/01)

One pin representation to multiple pads (28/05/01)
Loading control characters in ACCEL EDA (28/05/01)
Performing engineering change orders (ECOs) (28/05/01)
Using formality for RTL-to-gate in LSI Logic's FlexStream design flow (24/05/01)
Using formality in LSI Logic's FlexStream design flow (24/05/01)

Using PrimeTime in LSI Logic's FlexStream design flow (24/05/01)
Using Multibit register inference to save area and power (24/05/01)
TMS320C62x self-check program applications brief: Version 1.0 (21/05/01)
Sharing header files in C and assembly (03/05/01)
Oscillator noise analysis in SpectreRF (26/04/01)

Accurate Fourier analysis for circuit simulators (26/04/01)
Modeling and application of bonding pads (26/04/01)
An introduction to the PLL library (26/04/01)
Periodic s-parameter and noise analysis using SpectreRF PSP/PNOISE analyses (26/04/01)
How to simulate RTL designs with LSS memory (25/04/01)

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