Technical Archives (Sorted By Date)
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HAL levels the playing field
(01/05/01)
- Vendors should count silicon, not tapeout wins (01/05/01)
- Cadence's 'all-in-one' tool gets skeptic reviews (01/05/01)
- The need for an EDA API (01/05/01)
- Cadence, Agere tool would foster IC co-design (01/05/01)
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Modular component design reuse
(01/05/01)
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Timing analysis tools greatly impacts a successful design
(01/05/01)
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SERA tin evaluation for surface finish
(15/04/01)
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Hierarchical physical design for million-gate ASICs
(15/04/01)
- Protel upgrades P-CAD package (15/04/01)
- Process design kits take aim at custom ICs (15/04/01)
- Taiwan takes stocks (15/04/01)
- Oki, Lexra roll out prototyping boards for SoCs (15/04/01)
- Ikos lawsuit against Axis turns more complex (15/04/01)
- Verification firm starts partners program (15/04/01)
- Speed enhancements for Model Tech upgrades (15/04/01)
- Emulation or prototyping for silicon success? (15/04/01)
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Fixed-point math in C
(01/04/01)
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Solder joint reliability of BGA/CSP for mobile phones
(01/04/01)
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Solder joint reliability of BGA/CSP for mobile phones
(01/04/01)
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Which data transfer format is best for the industry?
(01/04/01)
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Complex designs demand greater attention to data management
(01/03/01)
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One approach for debugging of modified designs
(01/03/01)
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Integrating PCB layout with mechanical design
(01/03/01)
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Autorouters accelerate PCB design
(01/03/01)
- Strict 'surgery' on slate for electronics industry (01/03/01)
- Flow is shaky for programmable SoCs (01/03/01)
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Context switch
(03/02/01)
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Support multiple languages
(01/02/01)
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Direct plate processing for PCBs
(01/02/01)
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Solder masks: Examining rules of thumb
(01/02/01)
- Analyzing commodity and star intellectual properties (01/01/01)
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Toy story
(01/01/01)
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EDA platform benchmark: The desktop FPGA design flow
(01/01/01)
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Techniques for handling electromagnetic interference
(01/01/01)
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Contract manufacturing and flip-chip interconnect design
(01/01/01)
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Tiny file system
(06/12/00)
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Flexible dynamic array allocation
(04/12/00)
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On the ROPES
(03/12/00)
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IBIS and SPICE: Modeling languages for the demanding EDA industry
(01/12/00)
- Integrated approach for emerging tech designs (01/12/00)
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Improving productivity with FPGA design reuse
(01/12/00)
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Chemistry for the 0.13µm copper interconnect process
(01/12/00)
- SoCs likely to pose heading-off test problems (01/12/00)
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The advantage of using logic BIST for ASIC designs
(01/12/00)
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Applying Hubble technology to chip defects
(01/12/00)
- Let us give library development its due (01/12/00)
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The advantages of using PCB design reuse
(01/12/00)
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Embedded ICs: Expanding the possibilities
(06/11/00)
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Distributed software design: Challenges and solutions
(05/11/00)
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