What are CPLDs?
| A complex programmable logic device (CPLD) is a programmable logic device with complexity between that of PALs and FPGAs, and architectural features of both. It is made up of several simple PLDs (SPLDs) with a programmable switching matrix in between the logic blocks. CPLDs typically use EEPROM, flash memory or SRAM to hold the logic design interconnections. |
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| 2010-12-08 | CPLD family cuts power usage by 50 CPLD family cuts power usage by 50 |
| 2010-09-24 | CPLD packaging goes green CPLD packaging goes green |
| 2010-08-23 | Upgraded tool suite enhances CPLD design Upgraded tool suite enhances CPLD design |
| 2010-04-15 | Cutting power consumption with low-power CPLD Cutting power consumption with low-power CPLD |
| 2010-04-08 | Using reference designs in implementing low, high frequency ADCs Designers of digital systems are familiar with implementing the "leftovers" of their digital design by using FPGAs and CPLDs to glue together various processors, memories and standard function components on their PCB. |
| 2010-03-03 | PLD architecture trades off time with circuit density Tabula Inc., a fabless semiconductor start-up launches Spacetime, a programmable logic architecture that uses time as a third dimension and is claimed to surpass the performance of FPGA and CPLD architectures. |
| 2009-04-08 | Control analogue output from CPLD with PWM Control analogue output from CPLD with PWM |
| 2009-03-30 | Cut power in CPLD designs Cut power in CPLD designs |
| 2009-02-17 | Achieve zero standby current in CPLDs Here's an example in which MAX II CPLD registers' data is automatically stored before the power supply is cut off. |
| 2008-11-25 | Manage power in FPGAs using CPLDs Learn how multiple devices can be effectively power managed by a single CoolRunner-II CPLD. |
| 2008-11-25 | In-system programming using an embedded MCU Read about CPLD, FPGA and configuration PROM families that provide in-system programmability and pin locking. |
| 2008-11-12 | CPLD design and timing CPLD design and timing |
| 2008-11-10 | CoolRunner-II for selecting video source Know how CoolRunner-II CPLD works as a logical switch that can select between different MPEG video sources. |
| 2008-11-05 | Altera enhances Quartus II software Altera has unveiled Quartus II software version 8.1 for CPLD, FPGA, and HardCopy ASIC designs. |
| 2006-09-20 | I/O gating versus sleep modes Here are the differences between CPLDs with an I/O gating feature, and the "sleep modes" used by FPGAs. |
| 2008-09-22 | Zero-power CPLDs enable low-power portable apps Zero-power CPLDs bring the advantages of programmable logic to low-power design. |
| 2006-09-26 | Using CPLDs to manage power consumption in portables This article discusses two methods for reducing an application's power consumption through CPLDs. |
| 2008-09-01 | FPGA, CPLD vendors eye automotive sector FPGA, CPLD vendors eye automotive sector |
| 2008-06-25 | Altera CPLDs travel to Shenzhen Shenzhen Huayu Communications Technology Co. Ltd selected Altera's MAX IIZ for its P1200 handsets at the Olympics. |
| 2008-05-01 | Cut down processor power consumption with CPLD Cut down processor power consumption with CPLD |
| 2008-02-22 | Altera ships automotive-grade devices Altera will begin shipping automotive-grade devices for selected members of its CPLD, FPGA and structured ASIC device families. |
| 2008-01-08 | Altera unveils zero-power CPLDs for portable apps Altera Corp. has announced zero-power MAX IIZ CPLD designed specifically to address the power, package and price constraints of the portable applications market. |
| 2007-11-16 | PLDs ease time-to-market pressures Today's devices provide the advantages of both an FPGA and a CPLD with a non-volatile, low-cost, instant-on high performance logic solution for applications that have traditionally used CPLDs. |
| 2007-06-14 | Xilinx supports CoolRunner-II CPLD with starter kit Xilinx supports CoolRunner-II CPLD with starter kit |
| 2006-10-12 | Toshiba selects Altera's CPLDs for its PMPs Altera Corp. has announced that Toshiba Corp. has selected the Pb-free version of its MAX II CPLD family for their newest line of gigabeat portable media players. |
| 2006-07-20 | Macgraigor's boundary-scan tool eases FPGA, CPLD programming Macgraigor's boundary-scan tool eases FPGA, CPLD programming |
| 2006-07-17 | Altera addresses needs of portable application market Altera Corp. said the new MAX II devices feature ultra-small packages, a new power-down capability and the lowest cost in the industry. |
| 2001-03-19 | FLASH370i 5V to 12V dc-dc converter solutions This application note provides various solutions for the 12V super-voltage requirement for Cypress Semiconductor's Flash-based In-System Reprogrammable CPLDs in designs that do not already include a source for 12V. |
| 2001-03-26 | Power estimation and thermal management for Cypress CPLDs This application note discusses the estimation of power consumption and thermal management for Cypress Semiconductor's FLASH370i and Ultra37000 families of CPLDs. |
| 2003-12-20 | PCI bus target controller implementation using a Lattice CPLD PCI bus target controller implementation using a Lattice CPLD |
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