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2011-10-25 Semiconductor firms explore India, China
Lip-Bu Tan, chief executive at Cadence Design Systems, says semiconductor industry leaders are exploring the Chinese and Indian markets which are set to see explosive growth in chip consumption.
2011-01-14 Verification advancements ease ASIC, FPGA design
Verification advancements ease ASIC, FPGA design
2010-05-31 Cadence's Ahuja discusses EDA360 vision
Cadence's Ahuja discusses EDA360 vision
2010-05-28 Cadence, IBM team on high performance IPs
Cadence, IBM team on high performance IPs
2010-05-17 Cadence buys Denali
Cadence buys Denali
2010-04-29 Verification platform supports 512 simultaneous users
Cadence Design Systems, Inc unveils the Palladium XP, a verification platform that packs simulation, acceleration and emulation into a single verification environment.
2010-03-29 Cadence takes over EDA start-up Taray Inc
Cadence takes over EDA start-up Taray Inc
2009-11-17 Global conference series makes a pit stop at India
EE Times-India caught up with Rahul Arya, marketing and technical sales director at Cadence Design Systems (I) Pvt. Ltd, to discuss India's domestic semiconductor industry and to find out what Indian engineers should expect at the CDNLive!.
2009-07-23 Cadence, Toshiba address SoC design challenges
Cadence, Toshiba address SoC design challenges
2009-01-13 Cadence board appoints one of its own as CEO
Cadence board appoints one of its own as CEO
2008-12-19 Analyst: Cadence needs new products
Analyst: Cadence needs new products
2008-08-28 RFIC design using Virtuoso Designer
RFIC design using Virtuoso Designer
2008-07-08 Global route environment technology for Allegro PCB design GXL
Global route environment technology for Allegro PCB design GXL
2008-02-19 Cadence, Mentor upgrade OVM source-code library
Cadence, Mentor upgrade OVM source-code library
2007-06-21 Price wrangling suspends Cadence private-equity buyout
Price wrangling suspends Cadence private-equity buyout
2007-03-28 Stir manufacturing into design effectively
Stir manufacturing into design effectively
2007-02-27 EDA 'troublemakers' debate at DVCon EDA vendor
The annual "EDA Bigwigs" panel at the Design and Verification Conference (DVCon) was renamed the "Troublemaker's Panel" this year for good reason. Confronted with provocative questions, DVCon EDA vendor representatives debated topics such as low-power standards, Cadence Design Systems' Skill language, and outsourcing to India.
2007-02-02 Cadence develops 'first' complete low-power solution
Cadence develops 'first' complete low-power solution
2007-01-08 Cadence incisive formal verifier selected for Ubicom's logic design team
Cadence incisive formal verifier selected for Ubicom's logic design team
2006-12-20 ISA, Cadence discuss low power design
ISA, Cadence discuss low power design
2006-12-15 Wipro selects Cadence as primary vendor
Wipro selects Cadence as primary vendor
2006-12-12 Cadence, Advantest enter automotive testing partnership
Cadence, Advantest enter automotive testing partnership
2006-12-06 Cadence CEO discusses emerging trends in semicon design
Cadence CEO discusses emerging trends in semicon design
2006-11-30 13 companies join Cadence's verification program
13 companies join Cadence's verification program
2006-11-29 Cadence upgrades Virtuoso custom design platform
Cadence upgrades Virtuoso custom design platform
2006-11-16 Design RFICs faster, accurately
Design RFICs faster, accurately
2006-11-15 Cadence, IBM team up to accelerate ASIC design
Cadence, IBM team up to accelerate ASIC design
2006-11-07 Cadence, Si2 partner for low-power design standard
Cadence, Si2 partner for low-power design standard
2006-10-31 Cadence, Source III collaborate on test validation
Cadence, Source III collaborate on test validation
2006-10-16 Cadence announces timing system for 65nm, 45nm designs
Cadence announces timing system for 65nm, 45nm designs
Max's Cool Beans

Clive Maxfield Strange modes of transport and other "stuff"

Someone just pointed me at a YouTube video that claims to show the world's first e-powered multicopter flight...

 

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