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| 2012-05-21 | Cadence in-circuit acceleration aids system dev't Cadence in-circuit acceleration aids system dev't |
| 2012-05-17 | Cadence working on "faster version" of Spice Cadence working on "faster version" of Spice |
| 2012-05-17 | Cadence offers NVMe IP sub-system for SSD apps Cadence offers NVMe IP sub-system for SSD apps |
| 2012-05-16 | Cadence flow lowers n/w flow processor power Cadence flow lowers n/w flow processor power |
| 2012-05-10 | Fujitsu adopts Cadence Chip Planning System for MCU chips Fujitsu adopts Cadence Chip Planning System for MCU chips |
| 2012-03-19 | Firms address silicon complexity challenges Cadence, TSMC and ARM executives stress on the need for stepping up collaborations to deal with silicon integration and complexity of technologies of semiconductor design. |
| 2012-03-09 | Cadence digital flow accelerates 20nm design Cadence digital flow accelerates 20nm design |
| 2012-02-28 | Cadence launches 'Design Contest 2012' in India Cadence launches 'Design Contest 2012' in India |
| 2012-02-23 | Cadence Ethernet IP core offers 40/100GbE sol'n Cadence Ethernet IP core offers 40/100GbE sol'n |
| 2012-02-07 | Cadence, Samsung collaborate on DFM solution Cadence, Samsung collaborate on DFM solution |
| 2012-01-09 | 2012: Interesting year for Indian electronics industry With the support and funding promised, the National Policy on Electronics has the potential to bring about change that will lead to significant economic and social betterment, says Jaswinder Ahuja from Cadence. |
| 2011-12-14 | Cadence: Universities on a learning curve Cadence: Universities on a learning curve |
| 2011-10-25 | Semiconductor firms explore India, China Lip-Bu Tan, chief executive at Cadence Design Systems, says semiconductor industry leaders are exploring the Chinese and Indian markets which are set to see explosive growth in chip consumption. |
| 2011-10-24 | ARM, Cadence, TSMC partner on 20nm design ARM, Cadence, TSMC partner on 20nm design |
| 2011-09-30 | IP speeds up adoption of latest mobile standards Cadence accelerates adoption of emerging mobile standards with expanded verification IP portfolio. |
| 2011-09-21 | Fujitsu adopts Cadence DFM tools for 28nm design Fujitsu adopts Cadence DFM tools for 28nm design |
| 2011-09-07 | Indian universities gain foundry access Indian universities can now have foundry access for silicon verification as part of the latest collaboration between Cadence and imec. |
| 2011-08-05 | Cadence chooses FTD for OrCAD distribution in India Cadence chooses FTD for OrCAD distribution in India |
| 2011-07-14 | Cadence gains clock optimisation tech with Azuro buy Cadence gains clock optimisation tech with Azuro buy |
| 2011-05-16 | Cadence launches online EDA store Cadence launches online EDA store |
| 2011-05-12 | Cadence enhances Silicon Realisation with Altos buy Cadence enhances Silicon Realisation with Altos buy |
| 2011-05-09 | Cadence suite enables hardware-software co-design Cadence suite enables hardware-software co-design |
| 2011-04-28 | PCB, IC packaging tech offers advanced co-design Cadence presents the Allegro 16.5 PCB and IC packaging technology offering advanced miniaturisation capabilities, uniquely integrated power delivery network analysis, and DDR3 design-in kit. |
| 2011-04-15 | DDR4 IP solution with optimised integration debuts Cadence team debuts a DDR4 IP solution and integration environment that claims to speed integration, reduce cost and ensure design manufacturability. |
| 2011-04-06 | Wide I/O memory controller IP advances power control Cadence unveils a licensable, wide I/O memory controller core that features additional power-saving features such as 'traffic sensing' offering advanced power control. |
| 2011-02-25 | Broadcom taps Cadence system verification platform Broadcom taps Cadence system verification platform |
| 2011-02-08 | Synopsys launches verification migration programme Synopsys Inc. has introduced the verification FastForward migration programme and invited Cadence Incisive and Mentor Questa users to join it. |
| 2011-01-27 | 40nm low-power base band chip taped out Spreadtrum Communications has taped out its first 40nm low-power chip utilising the Cadence Silicon Realisation flow. |
| 2011-01-14 | Verification advancements ease ASIC, FPGA design Cadence Design Systems Inc. revealed advancements that increase verification productivity, including a new release of Cadence Incisive technology. |
| 2011-01-07 | Applications-driven design calls for new tools, methodologies Given an applications-driven design trend, productivity, predictability and profitability will become more imperative for success, says Cadence's Jaswinder Ahuja batting for new tools and methodologies. |
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