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2012-05-21 Samsung starts mass production of 20nm DRAM chips
Korean giant Samsung has begun producing 4 GB low power DDR2 (LPDDR2) memory using its 20nm-class process node.
2012-01-23 Samsung eMCPs target mid-level smartphones
Samsung's embedded memory solutions tip 30nm low power DDR2 DRAM and 20nm NAND flash memory to meet the need for advanced software and increased data storage in smartphones and tablets.
2011-07-12 ±6A switching regulator targets DDR termination
Linear's LTC3617 is a step-down switching regulator that generates bus termination voltage for DDR/DDR2/DDR3 and future standard memory applications that require current sourcing and sinking.
2011-03-18 ONFI 3.0 NAND specification released
The new ONFI 3.0 standard for simplifying the integration of NAND flash memory into CE devices, uses the non-volatile DDR2 (NV-DDR2) interface enabling speeds of up to 400MBit/s.
2010-12-10 Implement DDR2 SDRAM interface in FPGA
Implement DDR2 SDRAM interface in FPGA
2010-11-08 DDR2 SDRAM offers 256Mb density support
DDR2 SDRAM offers 256Mb density support
2010-08-03 Motherboard for 45nm processor uses dual channel mem
Gigabyte Technology reveals the GA-G41M-Combo motherboard for the 45nm Intel multi-core processor that supports both DDR2 and DDR3 RAM.
2010-07-23 DDR2 SO-DIMMs suit laptops, tablet PC
DDR2 SO-DIMMs suit laptops, tablet PC
2010-05-10 Configuring the SPEAr600 multi-port memory controller (MPMC) for external DDR SDRAM
Configuring the SPEAr600 multi-port memory controller (MPMC) for external DDR SDRAM
2010-05-04 Interfacing mDDR and DDR2 memories with the i.MX51
Interfacing mDDR and DDR2 memories with the i.MX51
2010-04-27 Monolithic 2Gbit LPDDR2 operates at 1.2V
Micron Technology Inc. unveils monolithic 2Gbit LPDDR2 memory chips that can be used as a stand-alone device or in combination with NAND for high-capacity multi-chip package or package-on-package solutions.
2010-03-26 Interfacing mDDR and DDR2 memories with i.MX25
Interfacing mDDR and DDR2 memories with i.MX25
2009-08-03 DDR3 SDRAM shortage to continue in Q3
Market analysts are forecasting DDR3 and DDR2 SDRAM shortages.
2009-07-08 Guide to LatticeSC/M DDR/DDR2 SDRAM memory interface
Guide to LatticeSC/M DDR/DDR2 SDRAM memory interface
2009-06-05 Memory model generator cuts verification time
Memory model generator cuts verification time
2009-05-28 Guide to using LatticeECP3 I/O interface
Know how to use the capabilities of the LatticeECP3 devices to implement high-speed generic DDR interface, and the DDR, DDR2 and DDR3 memory interfaces.
2008-10-08 Evaluating memory system power for DDR3
Evaluating memory system power for DDR3
2008-08-25 Intel plugs chip into TVs
The new chip from Intel sports a 3,000 Dhrystone MIPS x86 core, three DDR2 memory channels and a graphics block.
2008-08-13 Multi-chip package provides high-density memory
Multi-chip package provides high-density memory
2008-08-08 Regulator provides ultrafast transient response
TI has launched a DDR regulator that suits all power management requirements for DDR, DDR2, DDR3 and DDR4 low-power memory termination.
2008-08-04 DDR2 PCB design: get it right the first time
DDR2 PCB design: get it right the first time
2008-07-30 Implementing DDR2 PCB layout on the TMS320DM646x
Implementing DDR2 PCB layout on the TMS320DM646x
2008-08-01 Advanced memory tech offers higher speed
Advanced memory tech offers higher speed
2006-12-05 Implementing high-speed 667Mbps DDR2 interfaces with FPGAs
Implementing high-speed 667Mbps DDR2 interfaces with FPGAs
2008-06-25 Implementing DDR2 on TMS320DM646x DSPs
Implementing DDR2 on TMS320DM646x DSPs
2008-05-23 Server memory modules run at 1.5V
Server memory modules run at 1.5V
2008-05-06 Regulator fuses multimedia and memory
Regulator fuses multimedia and memory
2008-04-23 SO-DIMM notebook memory replaces standard memory
SO-DIMM notebook memory replaces standard memory
2008-02-25 PowerPC processor targets cost-sensitive apps
AMCC has announced the PowerPC 440EPr processor that features up to 500MHz of processing speed, dual GbE ports, 32bit PCI, USB2.0, support for 32bit DDR2 high-performance memory and an integrated Turbo Security Engine.
2007-06-01 Verify and debug DDR2 memory systems
Verify and debug DDR2 memory systems
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Clive Maxfield Strange modes of transport and other "stuff"

Someone just pointed me at a YouTube video that claims to show the world's first e-powered multicopter flight...

 

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