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| 2009-06-23 |
Upgraded EDA tool adds flow-routing option |
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Pulsic Ltd has introduced an upgrade to its physical chip design software suite, Unity 2009.1. |
| 2009-04-24 |
Axiom amps strategy with tool-centric services |
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Ravi Shankar, managing director at Axiom, shared the company's perspective on the current state of the EDA market |
| 2009-04-23 |
IMEC sends DFM tool for embedded SRAMs to Samsung |
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IMEC has successfully transferred the first EDA tool for statistical memory analysis to Samsung Electronics |
| 2008-09-15 |
Go beyond verification tool limits for analogue/RF designs |
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Know the limits of today's design approaches, and how the challenges of analogue/RF design and verification may be reduced by new EDA tools and techniques |
| 2008-06-17 |
IPL alliance creates buzz on analogue design |
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The IPL alliance seem to threaten Cadence's analogue EDA tool suite as it pushes for a standard PDK |
| 2008-05-14 |
Gauda picks SoftJin's Nirmaan for OPC acceleration tool |
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SoftJin's Nirmaan post layout EDA software development tool gives Gauda Inc. faster time to market |
| 2007-09-21 |
Chip makers, EDA vendors set up DFM coalition |
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The Silicon Integration Initiative (Si2) has announced that top chip makers and EDA tool vendors have established a coalition to add DFM parameters to existing design flow |
| 2007-07-03 |
SoftMEM's tools add MEMS to EDA software |
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SoftMEM's toolsets, when integrated with existing EDA tool sets, enables EEs to co-design electronics-with-MEMS chips without having to have the deep MEMS knowledge of a guru |
| 2007-03-28 |
Understand SPICE basics for circuit analysis, design (2) |
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Get a basic understanding of SPICE, a vital circuit modelling, simulation and analysis EDA tool |
| 2007-03-05 |
Freescale reports reduction in EDA tool flow |
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Freescale Semiconductor has reported significant design efficiency improvements and a sizeable reduction in the number of EDA "tool flows |
| 2007-01-10 |
EDA tool brings debug visibility for ASIC verification |
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Synplicity will shortly release details about TotalRecall, which it says will bring full debug visibility to FPGA prototypes used for ASIC verification. If successful, the technology could help FPGA prototypes rival far more expensive emulation systems. |
| 2006-12-22 |
Wireless library tool speeds up dev of 3GPP LTE designs |
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Agilent Technologies Inc. has announced the availability of its 3GPP LTE Wireless Library for use with the company's Advanced Design System (ADS) EDA software |
| 2006-12-12 |
Design complexity drives EDA tool functionality |
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During the next three years, the areas that are expected to drive growth for the EDA market are high level functional verification, ESL, DFM, RET, OPC and automotive electronics |
| 2006-11-16 |
Ciranova rolls out solution for p-cells |
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EDA start-up Ciranova Inc. said that it will roll out a solution for the creation and reuse of parameterized IC layout cells (p-cells). As a result, both new and legacy p-cells can be read by any tool based on the OpenAccess database |
| 2006-10-19 |
EDA tool platforms increase productivity in the nanometre era |
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The article is about platforms—what they are and how they can help in solving the problems in the nanometre era. It also discusses platforms that bridge design and manufacturing, and improves performance and cycle time. |
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