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2007-04-27 PowerPC processor with floating point unit for Virtex-4 FX devices
Software applications can be accelerated by three to twenty times by connecting a floating point unit (FPU) to the PowerPC auxiliary processor unit (APU) interface. This application note provides a complete reference design for implementing a Virtex-4 FX PowerPC 405 system with the Xilinx FPU coprocessor. Created using the Xilinx Embedded Development Kit (EDK), the design also include a source code for a finite impulse response (FIR) filter along with a graphics utility for display output on a Windows-based PC.
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