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| 2007-12-16 | Modelling for accurate Serdes design Modelling for accurate Serdes design |
| 2007-09-03 | Lattice cracks $10 price barrier for low-cost FPGAs Lattice Semiconductor has reduced production volume prices for industry's first low-cost serdes-capable FPGAs to as low as Rs.402.46 ($9.95) for the 20k-LUT LatticeECP2M-20. |
| 2007-03-16 | Address SI issues in high-speed board design This article discusses some of the SI challenges and the factors associated with high-speed interface designs that are enabled with key features of a RapidIO switch. |
| 2006-09-25 | FPGAs include SerDes, PCS block FPGAs include SerDes, PCS block |
| 2003-03-17 | Using FPGAs for high-speed serial interface design FPGA provides the bandwidth and flexibility for industry leading high-speed interfaces. Its True-LVDS technology was designed to support the strict timing requirement of up to four high-speed differential I/O protocols. |
| 2003-11-17 | 10Gbps serial data over copper backplanes - a reality The communications industry has all the building blocks to create a system that can deliver aggregate bandwidth of tens of terabit-per-second efficiently brought about by the availability of 10Gbps NRZ serial technology. |
| 2005-01-17 | Serial buses cut EMI, cabling constraints in 3G cam phones Serdes plays a role in reducing cabling constraints and EMI when interfacing cameras and LCDs to baseband processors in mobile phones. |
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