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| 2011-09-12 | Development kit features 28nm FPGAs Altera unleashes a full-featured Stratix V GX FPGA-based development kit that provides customers a platform to measure and evaluate transceiver link performance ranging from 600Mbps to 12.5Gbps. |
| 2010-01-05 | Manual placement of CMU PLLs and ATX PLLs in Stratix IV GX and GT devices Manual placement of CMU PLLs and ATX PLLs in Stratix IV GX and GT devices |
| 2010-01-05 | Achieving timing closure in basic (PMA direct) functional mode This application note describes two methods to achieve timing closure for designs that use transceivers in Basic (PMA Direct) mode at higher data rates for Altera's Stratix IV GX or Stratix IV GT FPGAs. |
| 2010-01-04 | Implementing the interlaken protocol in Stratix IV transceivers Implementing the interlaken protocol in Stratix IV transceivers |
| 2009-12-29 | Implementing the Serdes Framer interface level 5 (SFI-5.1) protocol in Stratix IV devices Implementing the Serdes Framer interface level 5 (SFI-5.1) protocol in Stratix IV devices |
| 2009-12-23 | Recommended protocol configurations for Stratix IV GX FPGAs Recommended protocol configurations for Stratix IV GX FPGAs |
| 2009-06-08 | Altera rolls out Stratix IV GX FPGA devt kit Altera rolls out Stratix IV GX FPGA devt kit |
| 2009-04-16 | Stratix II GX 10GbE loopback ref design Stratix II GX 10GbE loopback ref design |
| 2009-03-06 | Implement UNH-IOL test suite compliance in FPGA GIGE Read about implementation details required for GIGE designs that do not use TSE MegaCore and require UNH-IOL compliance. |
| 2009-02-12 | FPGAs with integrated 11.3-Gbps transceivers Altera's Stratix IV GT and Arria II GX 40-nm FPGA families join Stratix IV GX FPGAs and HardCopy IV GX ASICs. |
| 2009-02-11 | Guidelines for debugging transceivers Know the common causes of transceiver interfaces failing to synchronise and the steps to debug a design's power supplies, resets, and PLLs. |
| 2008-01-25 | Stratix II GX FPGAs support SFI-5 standard Stratix II GX FPGAs support SFI-5 standard |
| 2007-03-28 | Tap high-speed FPGA transceiver for PHY The demand for high-speed transceivers is increasing dramatically as systems are required to support higher data bandwidths, and implement a higher degree of functionality and features density. |
| 2006-09-14 | A/V development kit supports triple rate SDI The Audio/Video Development Kit, Stratix II GX edition from Altera Corp. is the first FPGA-based audio/video development kit designed to support triple rate SDI. |
| 2006-07-31 | Altera begins shipping FPGA with embedded transceivers Altera Corp. has begun shipping the Stratix II GX family's EP2SGX130 device, said to be the largest FPGA with embedded transceivers. |
| 2006-05-08 | Altera ships second member of Stratix ll GX FPGAs Altera ships second member of Stratix ll GX FPGAs |
| 2006-04-03 | Altera ships dev kit to validate signal integrity Altera Corp. has announced that it has begun shipping its Stratix II GX EP2SGX90E FPGA and accompanying development kit. |
| 2005-10-27 | Altera releases enhanced Quartus II PLD design tool Programmable logic supplier Altera Corp. introduced early this week an enhanced version of its Quartus II design software. |
| 2005-11-04 | Altera offering x8 PCI Express core for Stratix II Altera offering x8 PCI Express core for Stratix II |
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