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| 2011-03-16 | 3D, multi-probe testing solutions unveiled 3D, multi-probe testing solutions unveiled |
| 2008-09-08 | Combine techniques to reduce ICT cost, complexity A hybrid between VTEP vectorless testing and boundary-scan results in an extremely powerful tool that combines the standardised, limited-access, digital stimulus capability of boundary-scan with the vectorless simplicity of VTEP. It draws the best from what each technology offers and enhances the overall capability of ICT systems. |
| 2007-03-01 | Testing and debugging DSP systems (2 Testing and debugging DSP systems (2 |
| 2008-06-19 | JTAG breaks barrier between structural and functional testing JTAG breaks barrier between structural and functional testing |
| 2006-04-07 | JTAG Tech offers tool to simplify boundary-scan apps JTAG Tech offers tool to simplify boundary-scan apps |
| 2001-05-25 | ASIC I/O test considerations This application note describes the difference between test and nontest I/Os. It also defines the requirements for boundary-scan cells associated with nontest I/Os. |
| 2001-09-01 | Functional test in a high-density PCB environment In-circuit testing has a major problem, access, so functional test is important again. The paper outlines some of the design considerations and strategies to implement functional tests. |
| 2003-06-24 | Pin-sharing techniques for the C2 interface This application note discusses the C8051F30x device, which includes an on-chip Cygnal 2-wire (C2) interface for in-system debugging and boundary scan testing. |
| 2004-08-02 | Testing SoC interconnects using boundary scan Testing SoC interconnects using boundary scan |
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