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| 2012-03-05 | 28nm device architecture targets wireless apps TI's scalable KeyStone II architecture includes support for both TMS320C66x DSP generation cores and multiple cache coherent quad ARM Cortex-A15 clusters, for a mixture of up to 32 DSP and RISC cores. |
| 2011-04-11 | Intel debuts 10-core processors Intel debuts the Xeon E7, a new family of 32nm 10-core, dual-threaded server processors that support up to 20 threads, 2TBytes main memory and 30MB of last-level cache in a 513mm2 die. |
| 2010-11-30 | ISSCC showcases processor built with plastic foil The ISSCC will have researchers showcasing a simple microprocessor built from two thin sheets of plastic foil as well as a 5.2GHz IBM CPU and Intel Itanium chip packing 54MB cache. |
| 2010-06-21 | Intel provides update on floating-body R&D For years, FBC has been touted as an alternative to conventional cache memory and Intel Corp. has revealed details of its ongoing research on floating-body cells for advanced cache designs in microprocessors at the 2010 Symposium on VLSI Circuits. |
| 2010-05-13 | PMC-Sierra buys channel storage biz PMC-Sierra Inc. has acquired Adaptec's channel storage business, which includes RAID storage product line and SSD cache performance solutions to strengthen its existing enterprise storage business. |
| 2010-04-01 | AMD rolls out 45nm 12-core server processor family AMD rolls out its 45nm chip family, the Opteron 6000 that sports 12 cores and 12MB shared L3 cache based on two six-core dice in a single package. |
| 2010-03-09 | Processor offers 1.7DMIPS/MHz performance eASIC Corp. has released the Aeroflex Gaisler's LEON4 processor that betters the performance of its predecessors by up to 50 per cent at the same clock frequency. |
| 2009-08-05 | CompactPCI blade tailored for mission-critical apps Adlink Technology Inc. has introduced the cPCI-6880 series of 6U CompactPCI blades featuring 45nm Intel Core2 Duo processor T9400 offering 2.53GHz core speed, 6MB L2 cache and 1066MHz FSB with 40W typical total power consumption. |
| 2009-02-03 | Optimising architecture-oriented C, Part 2 Know how to optimise C to account for memory alignment, cache features, endianness, and app specific instructions. |
| 2009-01-06 | Intel ships quad-core processor Intel's Q9000 has been designed into Acer's Aspire 8930G notebook PC, said the computer maker. |
| 2008-12-01 | Achieve cache coherence in MIPS32 multi-core design Achieve cache coherence in MIPS32 multi-core design |
| 2008-09-25 | SRAM interface in MIPS32 M4K core for MCU apps This paper discusses the SRAM interface, a standard feature of the MIPS32 M4K core. |
| 2008-08-21 | Memory designs to rely on FBCs FBC technology enables three to four times the bits compared with traditional embedded memory in cache designs. |
| 2006-07-04 | Optimising for cache performance (1 Optimising for cache performance (1 |
| 2006-07-04 | Optimising for cache performance (1 Optimising for cache performance (1 |
| 2006-07-10 | Optimising for cache performance (2 Optimising for cache performance (2 |
| 2006-07-10 | Optimising for cache performance (2 Optimising for cache performance (2 |
| 2008-07-16 | The evolution of processor cores Today's processor cores integrate more than 2 crore (20 million) transistors, supported by cache memories. |
| 2008-06-27 | PMIC backs up DDR battery Maxim Integrated introduces an integrated power management IC for DDR cache-memory backup. |
| 2008-03-24 | Sneak peek at Intel's upcoming chip lines Intel's Pat Gelsinger tipped the press last week about a quad-core device with a 30Mbyte cache and two billion transistors. |
| 2004-01-02 | The best way to move multimedia data With embedded media processors assuming the role of both microcontroller and signal processor, engineers need to understand how various memory management options work on these processors. While cache may be your first choice, the more active approach of DMA may be your best bet. |
| 2004-06-02 | Optimising memcpy improves speed Knowing a few details about your system-memory size, cache type, and bus width can pay big dividends in higher performance. |
| 2007-04-02 | Understand packet processing with multi-core processors Your cache configuration can have a bigger impact on overall system performance than you expect. |
| 2008-01-17 | Kontron launches three fanless CPU boards Kontron has launched three fanless CPU boards equipped with the energy-saving, cost-efficient 600MHz Intel Pentium M processor, 512KB L2 cache and 852GM chipset. |
| 2008-01-08 | Highly integrated MPU suits consumer apps Renesas has released a microprocessor that integrates a high-performance 32-bit SH-4A CPU core with a 1.9Gflops FPU running at 266MHz, MMU, 32Kbyte cache for instruction and data each, 16K RAM and a six-channel DMA. |
| 2007-08-20 | AMD extends x86 to ease multicore programming AMD has disclosed its plans to extend the x86 instruction set that would give software access to information about cache misses and retired instructions, thus optimising data structures for better performance. |
| 2007-02-22 | IBM's eDRAM challenges Intel IBM Corp. has disclosed that it will be able to pack as much as 48MB of eDRAM on a processor or ASIC when its 45nm process technology comes online in 2008. |
| 2007-02-19 | IBM to put 48MB on next-gen microprocessor By combining techniques in process and circuit design, IBM believes it can put as much as 48MB of fast DRAM on a reasonably sized CPU when its 45nm technology becomes available in 2008. |
| 2006-10-20 | Start-up Gear6 to announce novel RAM cache scheme Start-up Gear6 to announce novel RAM cache scheme |
| 2005-09-13 | Samsung's new hard disk drives Samsung's four new hard disk drives are equipped with a 7,200rpm spindle speed, 8.9ms average seek time and an 8MB cache buffer. |
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