What does CSP stand for?
| CSP stands for chip scale package or chip size package. It is a chip housing that is slightly larger than the chip itself. |
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| 2012-05-21 | Amkor plans chip packaging facility in Korea Amkor plans chip packaging facility in Korea |
| 2012-03-12 | Tablets to be 4th largest chip-consuming market Tablets to be 4th largest chip-consuming market |
| 2012-02-21 | A look at Micro SMDxt wafer level CSP Here's a comprehensive discussion on Micro SMDxt wafer level chip scale package. |
| 2011-10-27 | LDO comes in ultra-small WLCSP package NXP Semiconductors unleashes the LD6806CX4 LDO, featuring ultra-low dropout of only 60mV at a 200mA current rating in a small wafer-level chip-scale package. |
| 2011-05-17 | RF amplifiers claim ultra-small package size Avago debuts the 1x0.5x0.25mm VMMK-3xxx amplifiers offering functionalities such as a positive gain slope low-noise amplifier (LNA), a wideband LNA, a VGA, and four directional detectors. |
| 2011-02-25 | Millimeter-sized computing system debuts University of Michigan unveils a millimeter-sized, all-in-one processor designed for use in wireless sensor networks, remote surveillance and other applications requiring on-chip trackable smarts. |
| 2010-09-29 | IBM perfects pulsed-STM technique for single-atom bit-cells Physicists at the IBM Almaden Research Centre perfected a new pump-probe pulsed-STM technique that may pave the way to enabling single-atom bit-cells for memory ICs. |
| 2010-06-14 | Touchscreen controller enables ESD protection up to ±15kV Semtech Corp. debuts the SX8652, a new generation touchscreen controller that is optimised for low-power consumption (23µA), small size (1.46mm x 1.96mm chip-scale package), and high ESD protection (±15kV). |
| 2009-07-14 | Intro to Flip-Chip CSP Intro to Flip-Chip CSP |
| 2009-05-18 | Chip-scale methods unlock renewable energy boom Chip-scale methods unlock renewable energy boom |
| 2009-04-15 | MIT method could lead to narrower chip patterns MIT method could lead to narrower chip patterns |
| 2009-03-19 | PCB layout guidelines for peripheral controller Know the PCB layout guidelines for West Bridge Antioch in a wafer level chip scale package. |
| 2008-09-29 | Compass IC features three-axis magnetic sensors Honeywell has developed a 3-axis compass IC in a chip-scale package. |
| 2008-07-15 | Choosing the right package yields tangible benefits When creating a new integrated circuit, the initial focus is naturally on the design. |
| 2008-06-06 | Quantum mechanics yield chip-scale cooling Quantum mechanics yield chip-scale cooling |
| 2008-05-14 | Chip-scale package houses tiny amplifier Chip-scale package houses tiny amplifier |
| 2008-04-15 | Industrial muxes tout lowest on-resistance Analog Devices has introduced two analog muxes manufactured on ADI's proprietary iCMOS (industrial CMOS) process technology. |
| 2007-12-27 | Analysts see DTV chip market consolidation ahead Analysts see DTV chip market consolidation ahead |
| 2007-11-20 | Samsung cuts more than 1,600 jobs Samsung has cut more than 1,600 jobs this year, a step towards its "full-scale corporate restructuring", which is hounded by falling memory chip and flat-panel prices, cited AFP report. |
| 2007-08-02 | WiMAX module for portable apps debuts SyChip has launched its first mobile WiMAX chip-scale module that enables the addition of WiMax functionality to handheld devices and provides a turnkey system for WiMAX-enabled devices. |
| 2007-07-06 | Samsung moves to energy-saving chip, display products Samsung moves to energy-saving chip, display products |
| 2006-12-13 | Tessera claims thinnest WLCSP for camera modules Tessera Technologies Inc. has announced what claims as one of the slimmest surface-mountable wafer-level chip-scale packages (WLCSPs) available for camera modules, MEMS and optical detectors. |
| 2006-12-06 | AIT granted lead frame U.S. patent Advanced Interconnect Technologies (AIT) was granted U. S. patent number 7,129,116 for developing a process for the manufacture and use of partially patterned lead frames with near-chip scale packaging lead-counts. |
| 2006-09-01 | Cadence, Mentor battle over high-speed IC design Lack of standards for simulating chip interconnects as they scale up to 5Gbps and beyond has pitted Cadence and Mentor in fight for competing solutions. |
| 2006-08-10 | Lithography research stalls at 32nm While immersion lithography has given the chip industry a short reprieve to scale to Moore's Law, lithographers are counting on either extreme ultraviolet or 193nm immersion scanners with higher-index fluids for the 32nm half-pitch. |
| 2006-04-10 | CMD offers EMI filter for wireless handsets California Micro Devices is offering its generation Praetorian CM1452 EMI filter with ESD protection for wireless handsets in a 0.40mm pitch chip-scale package (CSP). |
| 2006-02-28 | Mistral introduces WLAN ref design Mistral is offering a OMAP5912-based WLAN reference design (WRD) featuring SyChip's IEEE 802.11g/b chip-scale module. |
| 2006-02-13 | Nano-photonics enables optical data transmission in ICs NEC Corp. has announced the development of fundamental silicon (Si) nanophotonics technology that facilitates optical data transmission in LSI chips by eliminating data transmission bottlenecks. |
| 2006-01-06 | Silicon's HDMI transmitter features low-power operation Designed for the mobile market, the SiI 9020 discrete high-definition multimedia interface (HDMI) transmitter from Silicon Image Inc. features low-power operation of 1.8V and chip-scale packaging |
| 2001-06-19 | Inductance analysis of chip scale packages Inductance analysis of chip scale packages |
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