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| 2011-03-25 | Jitter cleaner ICs reduce clocking BOM costs National Semiconductor Corp. unveils a family of clock jitter cleaners that offer a phase noise and rms jitter performance of 111 femtosecond (fs) from 12kHz to 20MHz. |
| 2010-05-10 | Tool enables prediction of phase-noise performance Tool enables prediction of phase-noise performance |
| 2010-03-17 | TLK313x CPRI multi-hop performance with the CDCM7005 clock jitter cleaner TLK313x CPRI multi-hop performance with the CDCM7005 clock jitter cleaner |
| 2008-10-21 | Clock jitter cleaners improve system accuracy Clock jitter cleaners improve system accuracy |
| 2007-12-04 | Clocking high-speed A/D converters Extremely high-speed ADCs demand a low-jitter sample clock in order to preserve SNR. These 8bit and 10bit converters have best-case noise floors set by quantisation noise. In this article, we look at the strategy for optimising the performance of the sample clock based on PLL/VCO characteristics. This means minimising overall integrated phase noise, which minimises clock jitter. |
| 2006-10-19 | 14-channel clock generator features below 1ps jitter 14-channel clock generator features below 1ps jitter |
| 2002-08-16 | Hidden complexities of PLLs are revealed Measuring PLLs in a quiet, low-noise environment can yield optimistic and misleading jitter results. |
| 2003-09-16 | A summary of PLL and clock system design A summary of PLL and clock system design |
| 2005-06-01 | Sampled systems and the effects of clock phase noise and jitter Sampled systems and the effects of clock phase noise and jitter |
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