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| 2012-05-10 | Fujitsu adopts Cadence Chip Planning System for MCU chips The Cadence Chip Planning System delivers a unified chip planning environment that enables efficient information sharing among global design teams. |
| 2011-11-22 | Project aims at integrated smart systems design Project aims at integrated smart systems design |
| 2011-05-13 | Software updates optimise DSP multi-core design Software updates optimise DSP multi-core design |
| 2011-04-15 | DDR4 IP solution with optimised integration debuts Cadence team debuts a DDR4 IP solution and integration environment that claims to speed integration, reduce cost and ensure design manufacturability. |
| 2011-02-21 | Evolution of manufacturing closure for advanced nodes (Part 3) Learn how performing signoff DRC/DFM verification within the place and route environment affects the design flow and improves time to closure. |
| 2011-02-01 | F&S awards RSL for remote source lighting design F&S awards RSL for remote source lighting design |
| 2010-12-14 | Software streamlines design to manufacture process Software streamlines design to manufacture process |
| 2010-09-09 | PSoC Creator IDE supports low-power design PSoC Creator IDE supports low-power design |
| 2010-08-04 | EU project streamlines embedded system design EU project streamlines embedded system design |
| 2010-07-15 | PSoC sol'n packs new IDE version, design kits PSoC sol'n packs new IDE version, design kits |
| 2010-07-07 | Free PCB design tool delivers unique features Free PCB design tool delivers unique features |
| 2010-06-08 | ESL modelling, simulation tool outputs C code CoFluent Design will present a pre-release demonstration of the embedded C code generation feature in its CoFluent Studio ESL modelling and simulation software environment. |
| 2010-06-01 | Easing the transition to next-gen automated design tools Easing the transition to next-gen automated design tools |
| 2010-04-29 | Verification platform supports 512 simultaneous users Cadence Design Systems, Inc unveils the Palladium XP, a verification platform that packs simulation, acceleration and emulation into a single verification environment. |
| 2010-03-30 | How to deal with formal verification issues Formal model checkers are indispensable, complementing simulation for block-level verification in an ever-challenging design environment. Constraints make a formal tool tick. |
| 2010-03-29 | Tool offers tear-off tabs to ease software design Tool offers tear-off tabs to ease software design |
| 2010-03-10 | Ensure reliability, stability in high-temp electronics High-temperature electronics is a growing market. Merely surviving in a high-temperature environment is not good enough. To meet end-user demands, engineers also expect predictable performance, with stability and reliability. |
| 2010-02-19 | The challenges of next-gen automated design tools The challenges of next-gen automated design tools |
| 2009-12-18 | Simulation debugging using triple speed Ethernet testbench This application note shows how you can leverage the verification environment in the testbench provided in the Altera Triple Speed Ethernet MegaCore function to debug your system design. |
| 2009-09-14 | IP transformation centre opens in Chennai The IPTC enables service providers to design, test and integrate their solutions in a risk-free environment. |
| 2009-09-11 | Implement high-efficiency electronic motor controls System designers must be the most "friendly" people on Earth, as they design products that are manufacturing-, user- and environment-friendly. Here's how you can implement high-efficiency electronic motor controls. |
| 2009-07-14 | MC9S08SG32 high-temp devices design guidelines MC9S08SG32 high-temp devices design guidelines |
| 2009-05-28 | Exar to use Synopsys platforms for 65nm designs Exar has signed an expanded business agreement to establish Synopsys as its leading EDA partner. |
| 2009-03-26 | Understand statistical static timing analysis Learn how the statistical timing approach analyses the design at corner environment conditions. |
| 2009-03-25 | Free SoftConsole version 2.2 now available Actel Corp. has introduced the next-generation free development environment for embedded design. |
| 2009-03-13 | Display industry steps up green efforts A recent survey shows that four out of five global electronic display companies have adopted green design practices. |
| 2009-02-25 | Maxim, Transim launch online design tool Maxim, Transim launch online design tool |
| 2009-02-25 | Design environment eases XDR memory development Design environment eases XDR memory development |
| 2009-02-23 | Made in India: DFM tool checks, analyses in single session Geometric's DFMPro integrated in the Pro/ENGINEER design environment targets designs that are difficult, expensive and almost impossible to manufacture. |
| 2009-02-05 | Quartus II software upgraded The 9.0 version includes full support for Altera's portfolio of transceiver FPGAs and HardCopy ASICs. |
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