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| 2012-04-02 | Recognising density requirements at 28 nm Density has transitioned from a back-end manufacturing concern that was of little interest to designers to an issue that affects the layout of standard cell libraries. |
| 2012-01-05 | Managing multi-Vt, multi-voltage domain timing/temp inversion As we move to 65 nm and below, it is important to choose the libraries corresponding to the lowest temperature PVT because of temperature inversion effects where the delay of the cell actually decreases with increase in temperature. |
| 2011-08-04 | Design software simplifies hardware integration Design software simplifies hardware integration |
| 2011-01-25 | Design kit targets 0.18µm power management process Design kit targets 0.18µm power management process |
| 2010-10-20 | IPL Alliance gets STMicro on board Joining IPL Alliance as its first semiconductor board member, STMicroelectronics brings interoperability expertise for multi-vendor flow to the alliance's efforts. |
| 2010-07-14 | MCU tools ease digital power design MCU tools ease digital power design |
| 2010-03-18 | IMEC, Altos to set up library re-characterisation service IMEC and Altos Design Automation Inc. will collaborate to offer re-characterisation of standard foundry libraries including core and IO cells at different process, temperatures and/or voltages. |
| 2008-11-14 | Synopsys makes contribution to IPL Alliance Synopsys has contributed a draft standard for interoperable property and parameter definitions to the IPL Alliance. |
| 2007-06-20 | Actel unveils block-based FPGA design Actel unveils block-based FPGA design |
| 2007-06-01 | IC designers analyse DFM tools IC design experts believed that DFM is best addressed through design rules, preverified blocks and improved standard-cell libraries, said the experts. |
| 2007-05-28 | Re-synthesis solution offers area, speed, power benefits Nangate Inc. has claimed that its Design optimiser solution is capable of creating an optimised gate-level design with area, speed or power benefits. |
| 2007-01-08 | Magma, UMC complete 65nm library suite Magma Design Automation announced that United Microelectronics Corp. (UMC) has characterised its internally developed libraries for 65nm and smaller process geometries using Magma's SiliconSmart. |
| 2006-05-29 | ST certifies Catapult C Synthesis Libraries from Mentor ST certifies Catapult C Synthesis Libraries from Mentor |
| 2006-01-25 | Agilent libraries allow RF, DSP co-design Agilent libraries allow RF, DSP co-design |
| 2005-09-09 | Elan verifies embedded memories using Cadence's tools Elan Microelectronics Corp. has validated its standard cell libraries and embedded memories using the Cadence Design Systems Inc.'s Encounter Conformal custom equivalence checking solution. |
| 2005-08-18 | Cadence Virtuoso speeds up Cray's supercomputer development Cadence Design Systems Inc. and supercomputer provider Cray Inc. have completed a project that migrate the full-custom layouts of the memory arrays and cell libraries. |
| 2001-04-01 | DSP intellectual property strengthens supply chain The availability of high-performance programmable DSP intellectual property has the potential to upset the traditional balance of power in the high-volume, high-dollar OEM market. |
| 2001-05-01 | Putting automated libraries into the flow Putting automated libraries into the flow |
| 2001-05-16 | C++ backed for system-level design C++ backed for system-level design |
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