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| 2012-05-21 | Getting closer to the peak of simulation-driven design Getting closer to the peak of simulation-driven design |
| 2012-04-11 | Fundamentals of 3D authoring (Part 1) This two-part series describes the process of 3D graphics design, with tips and techniques for creating high-quality models suitable for use in a variety of embedded designs. |
| 2012-03-09 | Cadence digital flow accelerates 20nm design Cadence digital flow accelerates 20nm design |
| 2012-03-05 | Samsung's 20 nm DFM based on Mentor's Calibre platform The DFM sign-off solution is available for consumer and telecommunications designs targeting advanced process nodes. |
| 2012-01-23 | Towards the realm of app-specific solutions Altera feels the demands of new technology nodes are beginning to reach beyond the level of circuit design, requiring collaborative approach to find improvements in performance and energy efficiency. |
| 2011-12-16 | Shift from FPGAs for prototype to ASICs for production The idea of migrating an FPGA design into an ASIC can be overwhelming to a design team, but careful planning can significantly ease the process. |
| 2011-11-03 | ARM acquires design optimisation firm, Prolific ARM acquires design optimisation firm, Prolific |
| 2011-10-24 | ARM, Cadence, TSMC partner on 20nm design ARM, Cadence, TSMC partner on 20nm design |
| 2011-09-22 | Open Silicon gains low-power ASIC design patent Open Silicon gains low-power ASIC design patent |
| 2011-09-16 | Touch controllers simplify design process Touch controllers simplify design process |
| 2011-08-26 | Embedded systems intensify security As intrusions into embedded systems mount from the rise in Internet-enabled devices, embedded systems design process must focus on security that is virtually immune to hacking. |
| 2011-06-14 | Magma ties with Fraunhofer for analogue IP models Magma and Fraunhofer IIS partner to create process-independent Titan Flexcell models of the Institute's analogue IP cores aimed at accelerating analogue design implementation. |
| 2011-06-09 | Analysis: Lower EDA design costs to drive growth Analysis: Lower EDA design costs to drive growth |
| 2011-06-02 | Reference flow enhances TSMC 28nm design Reference flow enhances TSMC 28nm design |
| 2011-02-23 | TSMC, Taiwan University design 40nm 3D chip TSMC, Taiwan University design 40nm 3D chip |
| 2011-02-10 | Platform enables multicore optimisation tech Synopsys' Platform Architect with Multicore Optimisation Technology enables architecture definition, hardware-software partitioning and performance analysis at the concept phase of the design process. |
| 2011-02-17 | PRC/EPRC: Data integrity and security controller for partial reconfiguration Learn about a data integrity controller for partial reconfiguration that can be included in any partially reconfigurable FPGA design to process partial bitstreams for data integrity. |
| 2011-02-08 | PDK standards not in sight With disagreements over approaches to PDK standards, a solution that will enable and speed up new analogue and mixed-signal designs in a foundry is not expected anytime soon. |
| 2011-01-25 | Design kit targets 0.18µm power management process Design kit targets 0.18µm power management process |
| 2011-01-24 | RTL-to-GDSII reference flow optimised for 32/28nm Magma Design Automation says its hierarchical RTL-to-GDSII reference flow is now available for the Common Platform alliance's 32/28nm low-power process technology. |
| 2010-12-14 | Software streamlines design to manufacture process Software streamlines design to manufacture process |
| 2010-11-24 | TSMC qualifies Synopsys' IC Validator TSMC's qualification of Synopsys IC Validator offers the advantages of the in-design flow to the broad range of design teams utilising TSMC's 40nm and 65nm process technologies. |
| 2010-09-20 | Tanner EDA now part of IPL Alliance Tanner EDA is now a member of the IPL Alliance, which aims to promote interoperable process design kit (iPDK) standards. |
| 2010-09-20 | Dev't platform tailored for 32bit microcontrollers STMicroelectronics releases the STM32 discovery kit, a hardware development platform tailored to ease the design and development process for its 32bit microcontrollers. |
| 2010-09-03 | Nanoamps: crucial in extreme low-power design Nanoamps: crucial in extreme low-power design |
| 2010-09-09 | PSoC Creator IDE supports low-power design PSoC Creator IDE supports low-power design |
| 2010-08-12 | Optimizing IP integration A fundamental shift has occurred in SoC design. This shift has largely gone unnoticed and has introduced significant unnecessary costs and inefficiencies into the design process. |
| 2010-08-04 | EU project streamlines embedded system design EU project streamlines embedded system design |
| 2010-06-28 | Making virtual prototyping better than designing with hardware (Part 2) By using virtual prototypes through the entire development process, higher quality products can be created in less time. |
| 2010-06-21 | GlobalFoundries CEO calls for concerted effort in EDA Design Automation Conference (DAC) keynoter and GlobalFoundries CEO Doug Grose believes that IC design firms need to redefine relationships with manufacturing partners, and foundries must create new model that brings manufacturing and design into an integrated process. |
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