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| 2012-03-15 | How to improve RF spurious performance Most of the RF engineer's intuitive rules are based on simple principles that can be applied during the layout review. |
| 2010-05-25 | The benefits of creating patterns As design nodes drop below 45nm, design rules are exploding in number and complexity, making design rule checking (DRC) harder and lengthier. |
| 2010-05-14 | IC compiler speeds up MCMM scenario processing Synopsys, Inc.'s latest version of IC compiler, IC Compiler 2010.03 packs enhanced in-design technology and production support for all known 28/32nm design rules for major foundries. |
| 2009-02-23 | Made in India: DFM tool checks, analyses in single session Geometric's DFMPro integrated in the Pro/ENGINEER design environment targets designs that are difficult, expensive and almost impossible to manufacture. |
| 2008-12-03 | Understand programmable electrical rule checking Know how to check the robustness of a design at schematic and layout levels against various electronic design rules. |
| 2005-05-17 | The high-stakes world of quality IP The article discusses how to ensure the quality of a block of IP. It provides "12 rules of thumb" that promises better quality IP when followed carefully. |
| 2008-06-25 | Software detects clock violations Aldec announces ALINT 2008.06 with new enhancements including the addition of 15 new STARC rules. |
| 2004-08-01 | Looking good: A lesson in layout The engineers who implement user interfaces aren't always the best ones to design it. Good UI design is a speciality unto itself, with its own rules and guidelines. This month our resident UI specialist describes how to design user interfaces that are actually useable. |
| 2007-06-01 | IC designers analyse DFM tools IC design experts believed that DFM is best addressed through design rules, preverified blocks and improved standard-cell libraries, said the experts. |
| 2006-12-13 | Synthesis tool suffices CMP design rules Synthesis tool suffices CMP design rules |
| 2006-09-14 | Samsung announces 32Gb NAND flash memory based on 40nm Samsung Electronics Co. Ltd has announced the industry's first 32Gbit NAND flash memory, based on 40nm design rules and the company's proprietary CTF architecture. |
| 2006-06-26 | NEC, NEC Electronics unveil high-k CMOS tech NEC Electronics and NEC have introduced a CMOS technology for system LSIs using design rules for 55nm and below. |
| 2006-01-01 | Engineer-entrepreneur challenges market rules Engineer-entrepreneur challenges market rules |
| 2001-04-20 | Gate drive design for large die MOSFETs Gate drive design for large die MOSFETs |
| 2005-09-23 | Platform partners integrate design-for-manufacturing Platform partners integrate design-for-manufacturing |
| 2000-12-04 | Did file editing This application note discusses the advantages and disadvantages of the current methods, including the new Rules Did File Editor introduced with SPECCTRA 7.1. |
| 2001-02-01 | Solder masks: Examining rules of thumb Solder masks: Examining rules of thumb |
| 2001-07-16 | Validate EMC design rules with 3D simulation Validate EMC design rules with 3D simulation |
| 2002-11-08 | Simple Switcher PCB Layout Guidelines This application note discusses quick-set rules for simple switcher PCB layout. |
| 2004-11-30 | TV hardware design rules, PCB compatibility with ST92196/186 TV hardware design rules, PCB compatibility with ST92196/186 |
| 2004-11-30 | TV chassis hardware design rules for ST92X195 microcontrollers TV chassis hardware design rules for ST92X195 microcontrollers |
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