What does IC design verification mean?
| IC design verification refers to the process of determining whether or not the design of a product, of a given development phase, satisfies the conditions imposed from the start. |
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| 2012-04-25 | Mentor's verification platform aids SoC design Mentor's verification platform aids SoC design |
| 2012-02-02 | Tool eases verification of MEMS devices Tool eases verification of MEMS devices |
| 2012-01-25 | Fujitsu opts for Mentor's Calibre platform Mentor Graphics reports that Fujitsu has adopted the latest Calibre physical verification and design for manufacturing (DFM) capabilities in its analogue and digital design flows. |
| 2012-01-05 | EnSilica opens design centre in Bangalore EnSilica opens design centre in Bangalore |
| 2011-12-02 | AltaSens opts Berkeley's software for HD sensors AltaSens adopts Berkeley's AFS platform to design its HD CMOS image sensors. |
| 2011-11-09 | Using GreenPAK to design, program custom chip in minutes Using GreenPAK to design, program custom chip in minutes |
| 2011-11-03 | Address mixed-signal design issues with assertion-based verification Address mixed-signal design issues with assertion-based verification |
| 2011-10-05 | Integrated sol'n supports model-based design Integrated sol'n supports model-based design |
| 2011-09-16 | DSP design flow aims for medical imaging DSP design flow aims for medical imaging |
| 2011-08-29 | Chrontel boosts productivity with Magma s/w Chrontel standardises on the Titan analogue/mixed-signal design platform, FineSim and Quartz physical verification solutions and selects Magma software resulting in 50 per cent improvement in productivity. |
| 2011-07-29 | IC design platform automates routing tech IC design platform automates routing tech |
| 2011-07-13 | Verification tool offers automated error detection Verification tool offers automated error detection |
| 2011-06-28 | Symtavision, AUTOSAR vendors tie on timing design Symtavision, AUTOSAR vendors tie on timing design |
| 2011-06-28 | Improve simulation studies with 3D animation Read about the use of 3D animation in simulation-centric workflows to augment early verification activities, such as those used in model-based design. |
| 2011-06-08 | Simulator supports Xilinx FPGA hardware verification Simulator supports Xilinx FPGA hardware verification |
| 2011-06-03 | Synopsys, R&S to hasten LTE design, verification Synopsys, R&S to hasten LTE design, verification |
| 2011-06-06 | Get the most out of IDEs for hardware design and verification Get the most out of IDEs for hardware design and verification |
| 2011-05-24 | Micro sensors feature convergent optical design Micro sensors feature convergent optical design |
| 2011-05-05 | NVIDIA licenses NextOp's BugScope Graphics company NVIDIA signs a multi-licence agreement with NextOp Software Inc. for expanded use of NextOp's BugScope assertion synthesis product. |
| 2011-03-21 | Verification IP portal aids design community Verification IP portal aids design community |
| 2011-03-15 | Mentor touts instantaneous signoff verification Mentor touts instantaneous signoff verification |
| 2011-03-07 | Synopsys, Xilinx unveil SoC design manual Synopsys, Xilinx unveil SoC design manual |
| 2011-02-25 | Broadcom taps Cadence system verification platform Broadcom taps Cadence system verification platform |
| 2011-02-21 | Evolution of manufacturing closure for advanced nodes (Part 3) Learn how performing signoff DRC/DFM verification within the place and route environment affects the design flow and improves time to closure. |
| 2011-02-01 | Co-emulation modelling verification standard revised Co-emulation modelling verification standard revised |
| 2011-01-31 | Synthesis tool eases SoC design verification Synthesis tool eases SoC design verification |
| 2011-01-24 | EDA focus shifts to system level design EDA focus shifts to system level design |
| 2011-01-17 | Employing intelligently integrated physical design Employing intelligently integrated physical design |
| 2011-01-14 | Verification advancements ease ASIC, FPGA design Verification advancements ease ASIC, FPGA design |
| 2011-01-05 | SystemVue to ADS simulation bridge Here's a document that examines the link from SystemVue directly into a RF hardware design flow that allows mutual system-RF co-verification. |
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