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| 2011-11-03 | Address mixed-signal design issues with assertion-based verification Address mixed-signal design issues with assertion-based verification |
| 2011-08-29 | Chrontel boosts productivity with Magma s/w Chrontel boosts productivity with Magma s/w |
| 2011-06-28 | Symtavision, AUTOSAR vendors tie on timing design Symtavision, AUTOSAR vendors tie on timing design |
| 2011-06-28 | Improve simulation studies with 3D animation Improve simulation studies with 3D animation |
| 2011-06-08 | Simulator supports Xilinx FPGA hardware verification Simulator supports Xilinx FPGA hardware verification |
| 2011-05-24 | Micro sensors feature convergent optical design Micro sensors feature convergent optical design |
| 2011-05-05 | NVIDIA licenses NextOp's BugScope Graphics company NVIDIA signs a multi-licence agreement with NextOp Software Inc. for expanded use of NextOp's BugScope assertion synthesis product. |
| 2011-03-21 | Verification IP portal aids design community Verification IP portal aids design community |
| 2011-02-01 | Co-emulation modelling verification standard revised Co-emulation modelling verification standard revised |
| 2011-01-17 | Employing intelligently integrated physical design Employing intelligently integrated physical design |
| 2010-11-04 | Ricoh, DeFacTo's ink licensing deal Ricoh Company Ltd has inked a licensing agreement with DeFacTo Technologies SA for the HiDFT-Signoff Design-for-Test solution. |
| 2010-06-04 | Tools bridge chip design, verification with shared database Tools bridge chip design, verification with shared database |
| 2010-03-30 | How to deal with formal verification issues How to deal with formal verification issues |
| 2010-02-11 | Cut design time, cost with early verification Cut design time, cost with early verification |
| 2010-02-11 | Synopsys buys CoWare to expand verification line Synopsys buys CoWare to expand verification line |
| 2010-01-14 | Tech, tech practice to boost 2010 engineering success Mathworks India Pvt. Ltd managing director, Kishore Rao has identified parallel language, early verification with Model-Based Design as cornerstones of engineering success in 2010. |
| 2009-05-20 | Team-up enables MEMS/IC co-design, co-verification Team-up enables MEMS/IC co-design, co-verification |
| 2009-04-29 | JasperGold now used in AMD design centres JasperGold now used in AMD design centres |
| 2009-03-02 | Jasper launches new verification tools Jasper launches new verification tools |
| 2008-09-24 | Synopsys offers unified mixed-signal solution for custom design Synopsys offers unified mixed-signal solution for custom design |
| 2006-06-12 | Design and verification strategies for complex systems Design and verification strategies for complex systems |
| 2006-08-14 | Full-chip verification for analogue/mixed-signal ICs Full-chip verification for analogue/mixed-signal ICs |
| 2006-10-23 | Applying front-end design methodologies Applying front-end design methodologies |
| 2008-06-25 | Software detects clock violations Aldec announces ALINT 2008.06 with new enhancements including the addition of 15 new STARC rules. |
| 2008-03-27 | Analogue FastSPICE breaks verification barrier Analogue FastSPICE breaks verification barrier |
| 2007-11-05 | Design with Verification: Not an Oxymoron Design with Verification: Not an Oxymoron |
| 2007-09-24 | Magma, UMC team release verification, DFM tools for 65nm Magma, UMC team release verification, DFM tools for 65nm |
| 2007-09-24 | Firms address 65nm FPGA design verification Firms address 65nm FPGA design verification |
| 2007-09-06 | Rambus, Cadence jointly develop verified PCIe solutions Rambus and Cadence have collaborated to provide designers with an independently verified PCIe solution that seamlessly integrates Rambus' design IP with the Cadence's automated verification IP. |
| 2007-08-31 | Agilent unveils 3D electromagnetic simulator Agilent planar 3D EM simulator, when integrated with the Genesys EDA platform enables designers to reduce design steps and speed the design and verification process for complex RF and microwave passive circuit designs. |
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