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| 2010-06-04 | Industry favours 193nm immersion, EUV litho in survey A survey of technologists attending the Sematech Litho Forum revealed industry hails 193nm immersion double patterning and EUV as technologies to consider for manufacturing at 32nm and beyond. |
| 2010-03-03 | Delays, double-patterning dominates SPIE Litho Delays, double-patterning dominates SPIE Litho |
| 2010-03-01 | EUV delay makes alternatives a reality EUV lithography is delayed again and is now targeted for chip production at the 16nm half-pitch node, leaving the industry to face the dreaded double-patterning or some variation of the technology. |
| 2010-01-08 | Is TSMC switching to Nikon? In a surprise move, TSMC has procured a new 193nm immersion lithography scanner from rival Nikon Corp., according to sources. |
| 2009-12-15 | Nikon vows comeback with double-patterning Nikon vows comeback with double-patterning |
| 2009-06-23 | Intel takes 193nm litho to 15nm Intel claims that it has pushed 193nm immersion lithography down to 15nm—at least in the lab. |
| 2009-03-02 | Experts express doubts about next-gen litho Next-generation lithography (NGL) technologies like EUV, maskless nanoimprint and advanced double-patterning continue to face a lot of difficulties, according to a panel at the SPIE Advanced Lithography conference. |
| 2009-02-25 | Intel faces more obstacles in EUV litho "We are pushing hard on EUV," said Intel's director of lithography. But the chip giant sees more "technical gaps" in the technology. |
| 2008-07-22 | Chipmakers gear up for double-patterning Chipmakers gear up for double-patterning |
| 2007-10-26 | 64Gbit MLC NAND flash memory chip debuts Samsung has developed 30nm 64Gbit NAND flash memory by using self-aligned double patterning technology. |
| 2007-07-17 | Cadence acquires Invarium, addresses 45nm challenges Cadence has acquired Invarium to enhance its ability to address the 45nm and below patterning challenges that include double patterning, printability and scaling of very fine features. |
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