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| 2009-02-09 | Boost functional verification with SLEC SLEC has the capability to formally verify RTL implementations against a specification in C/C++ or System C. |
| 2005-09-09 | Elan verifies embedded memories using Cadence's tools Elan Microelectronics Corp. has validated its standard cell libraries and embedded memories using the Cadence Design Systems Inc.'s Encounter Conformal custom equivalence checking solution. |
| 2001-05-24 | Using formality for RTL-to-gate in LSI Logic's FlexStream design flow This application note describes procedures and recommendations for using the Formality formal equivalence checking tool for RTL-to-gate equivalence checking. |
| 2001-05-24 | Using formality in LSI Logic's FlexStream design flow This application describes procedures and recommendations for using the Formality formal equivalence checking tool for Gate to Gate equivalence checking. |
| 2001-11-16 | Equivalence checking for SoC blocks Equivalence checking for SoC blocks |
| 2003-08-18 | Interoperable tools ease equivalence checking Interoperable tools ease equivalence checking |
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