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| 2010-06-08 | ESL modelling, simulation tool outputs C code ESL modelling, simulation tool outputs C code |
| 2006-11-20 | Understanding enterprise system level (ESL) verification (1 Understanding enterprise system level (ESL) verification (1 |
| 2007-04-19 | Synplicity beefs up DSP tool, addresses ASIC designers Synplicity beefs up DSP tool, addresses ASIC designers |
| 2007-04-02 | FPGA use in HPCs faces bottleneck problems Current FPGA synthesis, placement and routing tools are written for hardware designers, not software programmers. A new generation of ESL C-language compilers is attempting to bridge the gap. |
| 2006-12-12 | Design complexity drives EDA tool functionality Design complexity drives EDA tool functionality |
| 2006-08-18 | MataiTech rolls out ESL tool to prevent bug at source MataiTech rolls out ESL tool to prevent bug at source |
| 2006-07-10 | Sequence, Bluespec offer ESL design for performance, area, power Sequence, Bluespec offer ESL design for performance, area, power |
| 2006-04-07 | Altera ESL tool increases embedded software performance Altera ESL tool increases embedded software performance |
| 2006-01-25 | Celoxica, Synoro collaborate on programmable IP Electronic system level (ESL) tool provider Celoxica has said that it would collaborate with Synoro Technologies to develop programmable intellectual property solutions for vertical market applications. |
| 2006-01-25 | Forte Design improves ESL synthesis tool Forte Design improves ESL synthesis tool |
| 2005-08-29 | ESL tool tames one tough task: On-chip register design ESL tool tames one tough task: On-chip register design |
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