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What is forward error correction?
In telecommunication and information theory, forward error correction (FEC) is a system of error control for data transmission, whereby the sender adds redundant data, known as an error-correction code (ECC), to its messages. This allows the receiver to detect and correct errors (with some limitations) without asking the sender for additional data. The advantages of FEC are that a back-channel is not required and retransmission of data can often be avoided though this is achieved at the cost of higher bandwidth requirements. FEC is therefore applied where retransmissions are relatively costly or impossible. In particular, FEC information is usually added to most mass storage devices to protect against damage to the stored data.
For instance, electrical or magnetic interference inside a computer system can cause a single bit of DRAM to flip to the opposite state. This problem can be mitigated by using DRAM modules that include extra (redundant) memory bits and memory controllers that exploit these bits. These extra bits are used to record parity or to use an ECC. Parity allows the detection of an odd number of wrong bits. The ECC may allow a single-bit error to be corrected and double-bit errors to be detected.
Error detection and correction in computer systems keeps going in and out of vogue. Seymour Cray famously said "parity is for farmers" to explain why he left it out of the CDC 6600. He included parity in the CDC 7600, and reputedly said "I learned that a lot of farmers buy computers."
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2012-01-19 Xtera ups capacity of long-haul optical n/ws
Xtera Communications showed the transmission of 26 channels at 100G each with coherent detection, DSP, and soft-decision forward error correction technologies along a 424km unrepeatered link.
2011-06-14 Flex FEC ASIP sol'n targets software-defined radios
Imec and Target Compiler Technologies release a C-programmable flexible FEC (forward error correction) solution targeted at future cellular, connectivity and broadcasting standards.
2011-03-11 EFEC IP cores target 100G applications
Altera unveils the EFEC IP cores optimised for Stratix IV and V series FPGAs and designed for 100G applications such as metro and long-haul optical networks (OTN).
2008-10-20 New chip advances software-defined radio
IMEC's FlexFEC device for software-defined radio can handle advanced forward error-correction technologies in WAN and WLAN.
2008-11-14 Trellis termination, tail biting
Know how to use the Xilinx Viterbi Decoder LogiCORE module to implement both trellis termination and tail biting.
2006-02-03 Tektronix tool analyses streaming video over IP
Tektronix Inc. has announced the availability of the Spectra2|VQM (video quality measurement) monitoring solution for the diagnosis and analysis of streaming video transmitted over IP.
2001-03-26 Forward Error Correction In Optical Networks
Forward Error Correction In Optical Networks
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