- Article
(40) -
Forum
(0) -
Blog
(0)
total search40 articles
sort by relevance
sort by date
| 2011-08-16 | USB cables support 3.3V logic level interfaces USB cables support 3.3V logic level interfaces |
| 2010-11-29 | PROFIBUS tipped chip eliminates use of ASIC, FPGA TI presents a single-chip ARM9 solution with an integrated PROFIBUS interface, the AM1810 Sitara ARM microprocessor for industrial applications like programmable logic controllers (PLC) or human machine interface (HMI). |
| 2010-06-16 | Synopsys to pay Rs.1,454.58 crore for Virage Logic Synopsys to pay Rs.1,454.58 crore for Virage Logic |
| 2010-04-22 | PSoC devices ease digital peripherals integration Cypress debuts the CY8C32xxx PSoC 3 Programmable Digital Family optimised for applications requiring programmable digital peripherals. |
| 2010-04-19 | Virage Logics has sub-systems on its radar Virage Logic plans on a makeover as it intends on becoming a supplier of 'sub-systems' that can be quickly embedded in SoCs for its licensees instead of just a provider of a collection of IP cores. |
| 2010-02-23 | Open-Silicon, Virage team on low-power silicon Open-Silicon Inc. and Virage Logic are teaming up to enable the development of significantly lower-power silicon. |
| 2009-09-03 | Transceiver zaps ground-to-ground differentials Linear's |
| 2009-06-05 | Use MID400 power line monitor MID400 is an optically isolated AC line-to-logic interface device for monitoring on or off status of an AC power line. |
| 2009-01-29 | AMD, Virage Logic announce collaboration AMD, Virage Logic announce collaboration |
| 2008-09-25 | SRAM interface in MIPS32 M4K core for MCU apps SRAM interface in MIPS32 M4K core for MCU apps |
| 2008-09-15 | Interfacing the FLEx72 to the TMS320C641x DSPs The connection between the TI DSP and the Cypress dual-port can be done with no glue logic. |
| 2008-02-28 | S2C releases third-gen rapid SoC prototyping tool S2C has released its third-gen rapid SoC prototyping tool equipped with two Xilinx LX series Virtex-5 FPGAs that features the ability to run TAI logic module's key functions from PC via an on-board USB interface. |
| 2007-08-29 | PC/104-Plus compatible board with two StarFabric interfaces debuts Digital-Logic has released the PC/104-Plus compatible board that works with all common PC/104-Plus CPU boards and provides a data rate of up to 2.5Gbits via two off-the-shelf RJ45 cables. |
| 2007-07-09 | OPTi sues 8 companies over Compact ISA-Bus patent OPTi Inc. has filed a patent infringement lawsuit against eight companies for making, selling and offering products related to two U.S. patents entitled, "Compact ISA-Bus Interface". |
| 2007-02-01 | Tundra division rolls out Interlaken IP core Silicon Logic Engineering Inc. (SLE) has developed a licensable Interlaken protocol IP core for use in ASIC or FPGA designs. SLE's Interlaken IP core is scalable, with early versions providing from 10Gbps to 60+Gbps bandwidth across the interface. |
| 2006-06-14 | Express Logic alleges Green Hills for infringing ThreadX API Express Logic alleges Green Hills for infringing ThreadX API |
| 2006-06-09 | Altera, MorethanIP unveil first IEEE 1588-compliant Ethernet MAC IP core Altera Corp. and MorethanIP have announced the first IEEE 1588-compatible Ethernet MAC IP core for FPGAs. |
| 2002-12-11 | ORCA Series 3 FPGAs Programmable I/O Cell (PIC): Logic, Clocking, Routing, and External Device Interface ORCA Series 3 FPGAs Programmable I/O Cell (PIC): Logic, Clocking, Routing, and External Device Interface |
| 2000-12-11 | Interfacing with MECL 10,000 Integrated Circuits This application note describes some of the MECL circuits used to interface with signals not meeting MECL input or output requirements. |
| 2000-12-07 | Board and interface design for AutoBahn Spanceiver (MC100SX1451FI50/100 Board and interface design for AutoBahn Spanceiver (MC100SX1451FI50/100 |
| 2000-12-06 | Interfacing between LVDS and ECL This application note is intended to show the interfacing between the LVPECL and LVDS signal levels. It also gives interface suggestions to and from 5V supplied PECL devices or negative supplied ECL. |
| 2000-11-29 | Pericom FCT logic for hot-plug applications Pericom FCT logic for hot-plug applications |
| 2002-06-28 | A quick JTAG ISP checklist This application note describes a short list of considerations needed for optimum performance of ISP designs. The considerations apply to Xilinx ISP device families. |
| 2001-03-23 | Using Cypress CPLDs in mixed-voltage systems This application note explains how the FLASH370i and Ultra37000/37000V CPLDs can interface with different logic families in a mixed 3.3V and 5V environment. |
| 2002-06-28 | Using the XC9500/XL/XV JTAG boundary scan interface Using the XC9500/XL/XV JTAG boundary scan interface |
| 2005-09-29 | Denali, LSI Logic ink agreement on memory interface IP Denali, LSI Logic ink agreement on memory interface IP |
| 2001-04-24 | Introduction to LVDS, PECL and CML This application note describes various ways of interconnecting between PECL, CML (current mode logic) and LVDS for high-speed communication systems using Maxim products as examples. |
| 2001-05-04 | Interfacing a TMS320C3x to the TLC320AD58C 18bit stereo A/D converter This application note discusses how to initialize the TMS320C3x DSP to interface with the TLC320AD58C 18bit stereo A/D converter without glue logic. |
| 2001-05-11 | A TDM interface for the TMS320C54x DSP A TDM interface for the TMS320C54x DSP |
| 2001-08-27 | Interfacing the CFP1032 to the MPC8260 This application note discusses the logic and register settings needed to interface Motorola's MPC8260 to Netlogic's NL77542 CIDR coprocessor, which provides next-hop route determination for 32K IPv4 addresses. |
Most Popular Articles
Search EE Times India
Max's Cool Beans
Strange modes of transport and other "stuff"
Someone just pointed me at a YouTube video that claims to show the world's first e-powered multicopter flight...
