- Article
(23) -
Forum
(0) -
Blog
(0)
total search23 articles
sort by relevance
sort by date
| 2011-10-05 | Deal with complexity of hardware design project management Read about an approach to combat the problems of IP management, remote site performance, inconsistent deployment, IP reuse and designer collaboration. |
| 2011-09-01 | Speed up processor verification with testbench infrastructure reuse Speed up processor verification with testbench infrastructure reuse |
| 2010-12-23 | Free IEEE 1685 IP reuse standard gets high traffic Free IEEE 1685 IP reuse standard gets high traffic |
| 2009-03-17 | Adaptive reuse: Plan, adopt, apply Adaptive reuse: Plan, adopt, apply |
| 2008-12-01 | Achieve cache coherence in MIPS32 multi-core design Read about design methods for facilitating design reuse centred on an open standard. |
| 2008-11-21 | Speed handset test with adaptive test case Adaptive test case methodology allows reuse of test IP across test cases, handset platforms and operating systems. |
| 2008-09-18 | Verification IP reuse for complex networking ASICs Verification IP reuse for complex networking ASICs |
| 2008-03-25 | Mentor's Platform Express supports IP-XACT 1.4 Mentor's Platform Express supports IP-XACT 1.4 |
| 2008-02-13 | Designing digital video broadcast and wireless systems with common FPGA building blocks Common IP building blocks for FPGAs make it easier for designers to implement one system for DTV and reuse and modify the same building blocks for other data communication applications. |
| 2007-11-15 | Altera, Synopsys team to offer Nios II for ASIC designs Utilising its core competencies in design-for-reuse, IP packaging methodologies and design flows, Synopsys will provide a configurable, fully synthesizable version of the Altera Nios II processor core optimised for ASIC implementation. |
| 2007-11-05 | IBM pioneers IC wafer reclamation process IBM has pioneered a new IC wafer reclamation process that removes the IP from the wafer surface, making these wafers available either for reuse in internal manufacturing calibration as "monitor wafers" or for sale to the solar cell industry. |
| 2006-02-16 | QIP metric streamlines reuse QIP metric streamlines reuse |
| 2006-01-16 | Charting the future of mobile digital video recorder Portable media players need sufficient headroom to accommodate different codecs in the growing multimedia content market. |
| 2005-12-22 | IP reuse needs a verification strategy IP reuse needs a verification strategy |
| 2004-07-16 | Platform ASICs deliver reduced cost for many applications To save time and cost, platform ASICs come with predefined and prediffused layers to which customers can add differentiations. |
| 2000-12-01 | Improving productivity with FPGA design reuse Improving productivity with FPGA design reuse |
| 2000-12-01 | The advantages of using PCB design reuse The advantages of using PCB design reuse |
| 2001-05-08 | System integration technologies support SoC design System integration is a critical bottleneck in the development of system-on-a-chip technologies. |
| 2001-06-01 | Fitting last year's IP to today's processes Fitting last year's IP to today's processes |
| 2001-06-01 | ASIC generation revamped for IP reuse ASIC generation revamped for IP reuse |
| 2001-06-01 | Extraction method verifies IP functions Extraction method verifies IP functions |
| 2001-06-16 | Analog, mixed-signal design flow found wanting Different views cloud the current analog/mixed-signal design flow issue and should stop concentrating on the problem but find a lasting solution for the industry to further prosper. |
| 2003-04-16 | Vendors must support IP reuse in SoC Vendors must support IP reuse in SoC |
--- total search 23 articles, total 1 pages, The 1 Page ---
1
Most Popular Articles
Search EE Times India
Max's Cool Beans
Strange modes of transport and other "stuff"
Someone just pointed me at a YouTube video that claims to show the world's first e-powered multicopter flight...











