What is a codec?
| Codec can stand for enCOder/DECoder or COmpressor/DECompressor. It can be a hardware circuit that performs analog-to-digital conversion and digital-to-analog conversion. It can also refer to any SW or HW that compresses and decompresses audio and video data streams. |
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| 2012-04-16 | JEDEC plans to standardise non-volatile wireless memory JEDEC plans to standardise non-volatile wireless memory |
| 2012-02-03 | Validation platform monitors DDR4 transfers Lecroy's Kibra 480 validation platform for DDR4 bus and JEDEC timing analysis monitors bus traffic, identifies timing violations and displays commands and errors on a full function waveform viewer. |
| 2011-07-01 | Device controller IP implements eMMC 4.5 spec Arasan unveils its MMC/eMMC 4.5 device controller IP that supports the latest JEDEC spec, designed to meet requirements for secure program code and data storage for consumer electronic products. |
| 2011-06-22 | Host controller IP implements eMMC 4.5 specification Arasan Chip Systems Inc. debuts the MMC/eMMC 4.5 Host Controller IP product that supports the JEDEC specs for secure yet flexible program code and data storage for consumer electronic products. |
| 2011-03-01 | JEDEC's flash memory standard targets mobile devices JEDEC's flash memory standard targets mobile devices |
| 2011-01-18 | Jedec pushes for smaller SSD form factor standards Jedec pushes for smaller SSD form factor standards |
| 2010-12-06 | Interfacing FPGA to JESD204A compliant ADC Know how to interface the Virtex-5 LXT, SXT, TXT, and FXT devices featuring GTP/GTX transceivers to an ADC compliant to JEDEC Standard |
| 2010-07-30 | JEDEC new standard enables energy efficiency JEDEC new standard enables energy efficiency |
| 2010-05-10 | Configuring the SPEAr600 multi-port memory controller (MPMC) for external DDR SDRAM This application note describes how to configure the MPMC to use different types of DDR and DDR2 memories, and tune the parameters in accordance with JEDEC requirements and the flexibility available in the application. |
| 2010-02-08 | JEDEC-compatible memory buffer ups data centre performance JEDEC-compatible memory buffer ups data centre performance |
| 2009-08-11 | DDR3 registered buffer simplifies board design Montage Technology has launched the M88SSTE32882 low power JEDEC-compliant DDR3 registered buffer device. |
| 2009-05-22 | CFI version 1.4 vendor specific extensions Here's an overview of the changes implemented between ver 1.3 and ver 1.4 of the flash memory Common Flash Interface implementation. |
| 2009-04-29 | First 54nm 1GB DDR2 DRAM consumes low power Hynix's new mobile DDR2 consumes only 50% of power compared to the previous generation mobile DDR. |
| 2009-04-16 | Jedec publishes new MMC V4.4 standard Jedec publishes new MMC V4.4 standard |
| 2009-04-09 | JEDEC publishes new low power memory standard JEDEC publishes new low power memory standard |
| 2008-09-16 | Jedec spec enables more accurate serial ADCs Jedec spec enables more accurate serial ADCs |
| 2008-09-01 | Standard sets Pb, Pb-free moisture sensitivity criteria The new IPC/JEDEC J-STD-020D revised standard should make life simpler for component manufacturers, who use the soak and accelerated soak specs to make sure that a component adheres to a given moisture sensitivity level, and for board assemblers, who use the levels to avoid damage to the components. |
| 2008-08-01 | Advanced memory tech offers higher speed LPDDR2 offers higher speed, lower-voltage operation, larger capacities and lower pin count than the current generation. |
| 2008-05-19 | 1Gbit mobile LPDDR2 meets JEDEC standards 1Gbit mobile LPDDR2 meets JEDEC standards |
| 2008-05-07 | DDR3 clock driver meets JESD47 spec Inphi Corp.'s registered clock driver passes JEDEC Standard JESD47. |
| 2008-03-31 | Micron, Hynix, Nanya disappointed on Rambus acquittal Micron, Hynix and Nanya released individual statements expressing their disappointment on a federal court jury decision that Rambus Inc. did not violate antitrust laws or commit fraud by illegally deceiving members of JEDEC in the establishment of important standards in the computer chip industry. |
| 2008-02-18 | Sandisk's iNAND packs double capacity SanDisk has introduced 16Gbyte iNAND EFD that packs double the storage capacity of conventional 8Gbyte products into a standard JEDEC 12-by-16mm package. |
| 2007-08-30 | Altera ships 65nm Stratix III FPGA family Altera has announced the shipment of its 65-nm Stratix III FPGA family that claims to deliver the lowest power consumption of any high-density, high-performance programmable logic device. |
| 2007-07-18 | Altera unveils JEDEC DDR3 SDRAM standard Altera unveils JEDEC DDR3 SDRAM standard |
| 2006-11-13 | Qimonda launches 183MHz DDR Mobile-RAM Qimonda AG has launched its 183MHz DDR synchronous Mobile-RAM offering a capacity of 512Mbit in a 60-ball FBGA package with 1.8V power supply. The device meets the JEDEC DDR standard. |
| 2006-08-21 | DDR2 DIMM module with 18.29mm height White Electronic Designs Corp. has launched its latest JEDEC-standard DDR2 DIMM aimed at low-height blade servers, network switching or embedded computer applications. |
| 2005-12-07 | JEDEC awards Elpida's Sugano JEDEC awards Elpida's Sugano |
| 2005-10-20 | New FB-DIMM features low size, latency and power consumption The IN581AMB fully-buffered DIMM from Inphi is said to be the first device that includes an interface between the high-speed serial interface and DDR2 SDRAM and is fully compliant with the JEDEC AMB specs. |
| 2001-04-15 | Same-die tactic eases DDR transition The industry consensus is clear: DDR's time has come. Now what design issues must engineers consider, and what can DRAM suppliers do to make this memory transition happen smoothly and seamlessly? |
| 2001-08-22 | The proper use of JEDEC standard software data protection The proper use of JEDEC standard software data protection |
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