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| 2012-03-12 | PDK available for 14nm logic chips Imec's early-version PDK for 14nm logic chips targets the introduction of a number of new key technologies, such as FinFET technology and EUV lithography. |
| 2012-02-15 | CEA-Leti showcases 22nm maskless lithography CEA-Leti showcases 22nm maskless lithography |
| 2011-01-20 | IBM, Toppan focus on ArF immersion litho for 14nm IBM and Toppan Printing Co. Ltd of Japan will focus their joint development efforts on ArF immersion lithography for the 14nm logic technology node. |
| 2010-09-23 | Opinion: e-beam critical to semiconductor manufacturing D2S Inc. CEO Aki Fujimura discusses the role of electron beam lithography in the future of semiconductor manufacturing and is of the opinion that all leading-edge designs will require e-beam technology. |
| 2010-03-04 | Nanoimprint for HDDs still under wraps While nanoimprint has still not emerged in mainstream production in semiconductor fabs, the technology has been delayed even in perhaps its biggest potential market: HDDs. |
| 2010-03-01 | EUV delay makes alternatives a reality EUV lithography is delayed again and is now targeted for chip production at the 16nm half-pitch node, leaving the industry to face the dreaded double-patterning or some variation of the technology. |
| 2010-02-24 | Toshiba, AIST team to up accuracy of optical litho Toshiba and the AIST have partnered to jointly develop a mask pattern optimising technology that improves the accuracy of lithography for LSIs by approximately 20 per cent. |
| 2010-02-24 | Samsung wants EUV litho by 2012 Samsung Electronics Co. Ltd declared at the LithoVision 2010 that it is keenly pushing its plans of extreme ultraviolet (EUV) lithography by 2012 despite signs that the technology will not be ready. |
| 2010-01-21 | CEA-Leti welcomes ST to e-beam litho programme The programme allows companies to assess a maskless lithography infrastructure for IC manufacturing and the use of Mapper Technology for high-throughput. |
| 2009-11-19 | EUV photoresist developed for 20nm Toshiba Corp. touts a photoresist suitable for use with EUV lithography and proved its viability in the first 20nm generation process technology. |
| 2009-10-06 | Stencil technology unveiled for maskless SoC Stencil technology unveiled for maskless SoC |
| 2009-10-01 | ITRI's 3D consortium welcomes SUSS MicroTec SUSS MicroTec pitches its 300mm technology to the Advanced Stacked-System Technology and Application Consortium. |
| 2009-08-11 | GlobalFoundries beats TSMC on tech, analyst says GlobalFoundries (GF) might be not a leader in terms of volume, but in any case, it is a leader in terms of technology, according to Gartner analyst Bob Johnson. |
| 2009-03-06 | Litho vendors hit by R&D gap, lousy economy The lithography industry continues to be plagued by an R&D gap, technology delays, and, of course, the lousy economy. |
| 2009-03-03 | TSMC reveals litho roadmap at SPIE conference TSMC has disclosed its lithography roadmap at the SPIE Advanced Lithography conference, saying it is still backing maskless technology. |
| 2009-02-27 | Team-up to develop co-optimised design solutions TSMC and Tela will also enhance the PowerTrim Service based on Blaze DFM's patented gate CD biasing technology. |
| 2009-02-25 | Intel faces more obstacles in EUV litho "We are pushing hard on EUV," said Intel's director of lithography. But the chip giant sees more "technical gaps" in the technology. |
| 2008-11-17 | An insider perspective of the semi industry Here's how chips are made, why ASICs cost so much, and what drives the industry to smaller process nodes. |
| 2008-09-30 | IBM, Intel explore block co-polymer lithography IBM, Intel explore block co-polymer lithography |
| 2008-07-21 | 450mm debate rages on Fab-tool vendors telegraphed their position on 450mm, reiterating that the economics do not add up for the next-generation wafer size. |
| 2008-03-18 | Sematech to host lithography forum Sematech to host lithography forum |
| 2008-03-07 | Mentor launches Calibre tools with Cell B.E. tech Mentor has released computational lithography tools accelerated with Cell/B.E. processor tech that have been qualified for production at IBM for 45nm and smaller process nodes. |
| 2007-10-08 | Toshiba explores 450mm fab, EUV litho tech Apart from exploring several new chip-production tech, Toshiba is also in talks with lithography partner Nikon and ASML Holding NV about the EUV technology. |
| 2007-09-25 | NIL, Oxford team to develop etch steps for nanoimprint tech Oxford Instruments combined its expertise in plasma etching with NIL Technology's experience developing templates, stamps and processes to create methods for etching the nanoimprinting stamps in fused silica. |
| 2007-08-24 | NAND suppliers: Litho bars NAND scaling Lithography vendors, according to NAND flash suppliers, cannot keep up with the breakneck pace of NAND, which is leading the process-technology curve in semiconductors. |
| 2007-06-25 | Intel plans inverse litho due to EUV delay With the possible delay of its extreme ultraviolet lithography, Intel disclosed that it is developing a DFM technology that could extend optical scanners to the 22nm node. |
| 2007-05-04 | HP licenses nanoscale technology HP licenses nanoscale technology |
| 2007-04-03 | Researchers claim cheaper technique to 65nm node Researchers at the Georgia Institute of Technology and Focal Point Microsystems announced 3D multi-photon lithography, a technique that claims to enable a cheaper, easier way to pattern at the 65nm node. |
| 2007-02-27 | IBM extends immersion lithography to 22nm IBM extends immersion lithography to 22nm |
| 2007-01-25 | NEC unveils CB-55L platform for cell-based ICs NEC Electronics Corp. has started offering its CB-55L platform for cell-based ICs developed on its UX7LS 55nm process technology. When NEC Electronics announced its UX7LS in November 2005, the company said immersion lithography technology would be used for critical processes. |
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