What is a memory interface?
| An external memory interface is a bus protocol for communication from an IC, such as a microprocessor, to an external memory device located on a circuit board. Internal memory interfaces apply to communication with on-chip memory. The asynchronous External Memory Interface (EMIF) is a Texas Instruments IC bus used in their DSPs and digital media SoCs. |
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| 2012-05-23 | ONFi IP, VIP solutions target NAND Flash storage Posedge teams with PerfectVIPs to provide Open NAND Flash Interface (ONFi) IP solution and ONFi verification solutions targeted at storage and memory ASIC development. |
| 2012-05-07 | Flash API for RX600 Know how to easily integrate reprogramming abilities into applications using user mode programming. |
| 2012-03-26 | Perform high speed read processing Find out how to speed up the read processing in the Renesas Quad Serial Peripheral Interface. |
| 2011-11-22 | TPM touts stronger security for e-commerce apps ST's ST33TPM12LPC supports an embedded 90nm non-volatile memory and has a low pin-count (LPC) interface. |
| 2011-11-18 | RTCC devices feature 10MHz SPI interface RTCC devices feature 10MHz SPI interface |
| 2011-10-11 | Samsung, Micron form Hybrid Memory consortium Samsung, Micron form Hybrid Memory consortium |
| 2011-06-20 | Programming Micron P8P Parallel PCM flash using serial peripheral interface Programming Micron P8P Parallel PCM flash using serial peripheral interface |
| 2011-05-24 | 3U VPX FPGA boards accelerate algorithm processing Acromag unveils VPX-VLX series of 3U VPX FPGA boards featuring a configurable Xilinx Virtex-5 FPGA enhanced with multiple high-speed memory buffers designed for accelerated algorithm processing. |
| 2011-05-16 | MLC NAND chip packs 64Gb, DDR 2 interface MLC NAND chip packs 64Gb, DDR 2 interface |
| 2011-04-29 | High-level security manager monitors multiple tampers Maxim's security manager, the DS3660, combines internal tamper monitors with tamper-detection inputs that interface with external sensors offering high security levels. |
| 2011-05-04 | Using user program mode Learn how to run the flash memory reprogramming program in SH7216 microcomputers user program mode. |
| 2011-04-11 | RFID chip packs I2C for wireless sensor apps NXP Semiconductors revealed the UCODE I2C chip featuring an integrated I2C interface and 3,328bit user memory targeting wireless sensor applications. |
| 2011-03-18 | ONFI 3.0 NAND specification released The new ONFI 3.0 standard for simplifying the integration of NAND flash memory into CE devices, uses the non-volatile DDR2 (NV-DDR2) interface enabling speeds of up to 400MBit/s. |
| 2011-03-01 | JEDEC's flash memory standard targets mobile devices JEDEC's flash memory standard targets mobile devices |
| 2011-02-25 | Industry proposes new mobile DRAM specs Vendors claim that a new technology is required to keep up with the memory bandwidth for mobile interface technology that is currently running at speeds of up to 333MHz. |
| 2011-03-02 | Using IIC3 to reprogram flash memory in user program mode Using IIC3 to reprogram flash memory in user program mode |
| 2011-02-11 | FPGAs aimed at 100G wireline applications Altera Corp. has completed interoperability tests between its Stratix IV GT FPGA and MoSys' Bandwidth Engine device in a serial memory application, providing designers of 100G wireline applications with a high-bandwidth memory solution. |
| 2011-02-16 | Interfacing QDR II SRAM devices with Virtex-6 FPGAs Here's a Verilog reference design that has been simulated, synthesized, and verified on hardware using Virtex-6 FPGAs and QDR II SRAM two-word burst devices. |
| 2011-02-02 | National, Rambus demo 20G+ capability National Semiconductor, Molex and Rambus are set to demonstrate new high-speed signalling capabilities for next-generation systems at this week's DesignCon event in Santa Clara, California. |
| 2011-01-28 | MCUs interface directly with capacitative touch pads MCUs interface directly with capacitative touch pads |
| 2010-12-21 | Building menu systems with GAPI Learn about a sample code that uses GAPI calls to access the bitmap in memory and toggle between displaying the checked and un-checked versions. |
| 2010-12-20 | Implementing sliding icons, transparency Know a sample code that uses GAPI calls to access the bitmap in memory and move it randomly about the screen. |
| 2010-12-20 | Creating touchable icons with GAPI Here's a sample code that uses GAPI calls to access the bitmap in memory and place its first icon at specific coordinates on the screen. |
| 2010-12-10 | Implement DDR2 SDRAM interface in FPGA Implement DDR2 SDRAM interface in FPGA |
| 2010-11-30 | Interface conditioning for SD card, MMC Interface conditioning for SD card, MMC |
| 2010-09-07 | UHS-II PHY IP provides high-speed memory interface UHS-II PHY IP provides high-speed memory interface |
| 2010-08-04 | Microprocessor embeds ARM A9 cores, DDR3 interface Microprocessor embeds ARM A9 cores, DDR3 interface |
| 2010-07-30 | FPGAs optimised for RLDRAM 3 support Altera Corp. reveals its Stratix V family of FPGAs that offer memory interface solutions capable of transferring voice, video and data across the Internet quickly and efficiently. |
| 2010-07-28 | Samsung,Toshiba team on DDR 2.0 NAND Samsung and Toshiba will develop a second-generation double data rate (DDR) NAND flash memory specification with a 400-Mbit/s interface. |
| 2010-06-01 | 125MHz waveform generators offer 1GS/s sample rate The ArbStudio series of arbitrary waveform generators deliver signals up to 125MHz, 1GS/s maximum sample rate, long memory, high resolution and a variety of operating modes. |
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