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| 2009-03-24 | IEEE sanctions new low-power standard IEEE sanctions new low-power standard |
| 2007-01-29 | Architect, design, implement, and verify low-power digital ICs Architect, design, implement, and verify low-power digital ICs |
| 2007-08-27 | Verifying your low-power designs Verifying your low-power designs |
| 2007-08-14 | Boost productivity with ESL techniques The increased complexity that comes with 90nm and smaller geometries have led to a myriad of severe challenges, including HW/SW co-design, power management and verification. An ESL methodology offers a viable solution to these challenges. |
| 2007-04-02 | Synopsys rolls design platform supporting UPF 1.0 Synopsys Inc. has announced a low-power design flow that will implement the Accellera Unified Power Format version 1.0 in its IC verification and implementation products in the second half of 2007. |
| 2007-02-02 | Cadence develops 'first' complete low-power solution Cadence develops 'first' complete low-power solution |
| 2007-01-25 | Virage Logic joins Si2's Low Power Coalition Virage Logic joins Si2's Low Power Coalition |
| 2006-11-07 | Cadence, Si2 partner for low-power design standard Cadence, Si2 partner for low-power design standard |
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