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EE Times India - total search 316 articles sort by date sort by relevance
SMIC adopts ARM Metro, Advantage products 2006-06-02
SMIC and ARM Ltd have jointly announced that SMIC has adopted the ARM Metro and Advantage products.  
Breaking the IC verification barrier 2006-06-01
Startup OneSpin Solutions believes that it has technology that will usher in an era of IC formal verification.  
Dongbu, Cadence develop reference flow for RTL to GDSII 2006-05-26
South Korean fab Dongbu Electronics has teamed up with Cadence Design Systems to jointly develop the DBE 130.2, an RTL-to-GDSII reference flow.  
Lattice validates Aldec"s simulators for its devices 2006-05-17
Aldec Inc. has announced that Lattice Semiconductor Corp. has validated Aldec's Riviera and Active-HDL simulators for use with Lattice devices.  
KPIT Cummins adopts Cadence AMS methodology kit 2006-05-10
Cadence Design Systems has announced that KPIT Cummins Infosystems Ltd. has adopted the Cadence AMS Methodology Kit.  
VDA VHDL-AMS models run in Synopsys' simulator 2006-04-28
Synopsys has announced that it has qualified the VHDL-AMS models to run in the Synopsys Saber simulator for use by automotive OEMs and suppliers.  
Saifun Semi adopts Cadence AMS kit 2006-04-28
Cadence Design Systems Inc. has announced that Saifun Semiconductors has adopted Cadence's Analog Mixed Signal Methodology Kit.  
Power issues charge up FPGA 2006 symposium 2006-04-06
Power issues charged up the recent FPGA 2006 symposium. Many observers see high power consumption as perhaps the biggest factor limiting wider usage of the devices.  
Common Platform partners announce 65nm DFM support 2006-04-03
Common Platform manufacturing partners have announced availability of DFM technology, models, design kits and data files from EDA and DFM suppliers.  
ESL, DFM design tools come up short 2006-03-17
Electronic system-level (ESL) and design-for-manufacturing (DFM) tools need to pack far more capabilities than they do today if they are to represent the EDA industry's best opportunities for growth.  
Innovation for eager eyes 2006-02-14
Professor Kirti Trivedi believes the information revolution is bypassing those without access to computers. The solution to this problem lies in developing a universal learning environment that would have educational material, and the inbuilt facility to access information from multiple media and channels.  
Cell processor generates high-quality natural motion 2006-02-08
Real-time computing will bring a paradigm shift for both the PC and semiconductor industries, according to Ken Katuragi, the president and CEO of Sony Computer Entertainment.  
Gildenblat partners with Xpedion in PSP model 2005-12-23
Xpedion Inc. has announced that it has formed a partnership with Dr. Gennady Gildenblat, co-developer of the public domain PSP model. Dr. Gildenblat will work with Xpedion to provide PSP parameter extraction for Xpedion modelling services.  
Wrestling with functional verification 2005-12-22
When chip complexity reaches 10 million or 100 million gates, the answer may lie in rethinking both verification and design.  
Verification moves up a level 2005-12-19
With the introduction of languages and transaction-level modelling, designers can think and work at higher levels of abstraction.  
Measuring progress facilitates verification coverage 2005-12-19
You must ensure that progress problems are observed and corrected early in verification with an efficient coverage plan.  
Toshiba fabricates 128Mb capacitor-less DRAM 2005-12-15
Toshiba has fabricated a 128Mb capacitor-less DRAM on an SOI wafer and verified its operation.  
IEEE approves SystemC standard based on SystemC 2.1 2005-12-14
IEEE has said that it has approved the SystemC electronic design language standard. IEEE standardization may help bring SystemC into more widespread use and pave the way for further support from commercial EDA tools.  
Forte, Summit collaborate on design, verification flow 2005-12-06
Forte Design Systems and Summit Design have collaborated to deliver an integrated solution that combines the strengths of the Vista SystemC IDE and Cynthesizer SystemC synthesis products.  
Jazz, Xpedion partner on RFIC design environment 2005-10-31
Xpedion Design Systems Inc. and Jazz Semiconductor Tuesday (Oct. 25) announced a partnership to deliver a qualified model and simulation environment for next generation radio frequency (RF) IC design  
Survey finds verification tool use largely unchanged from 2004 2005-10-27
The 2005  
Researchers propose approach to cut design validation time 2005-10-26
Five Indian researchers from the have proposed a new approach to formal property verification.  
Hitachi, Denali collaborate on CE-ATA simulation models 2005-10-18
Denali Software Inc. and Hitachi Global Storage Technologies have announced the availability of advanced CE-ATA simulation models for Hitachi's 8GB  
Design, manufacturing worlds collide at Bacus 2005-10-11
If there was a shred of doubt remaining about the magnitude at which IC design and manufacturing convergence is taking place, it was laid to rest last week (Oct. 3-7) at the 25th annual Bacus Photomask Technology symposium in Monterey, Calif.  
Mentor making automotive EDA push 2005-10-10
Looking to push its widely acknowledged lead in the automotive EDA space, Mentor Graphics Corp. Thursday (Oct. 6) announced a major new automotive design push.  
Cadence, UMC develop reference design for wireless 2005-10-10
EDA supplier Cadence Design Systems Inc. and Taiwan-based semiconductor foundry UMC have announced a collaborative agreement to develop a comprehensive reference solution for complex wireless designs.  
HyperLynx update supports Serdes design 2005-10-03
New capabilities of this signal-integrity product will help ease PCB design using Serdes interconnects.  
ARM, Ignios speed up multicore development 2005-09-29
ARM and Ignios Ltd have accelerated the development of multicore solutions by reducing the time and effort needed to develop, debug and run complex multicore simulations.  
Platform partners integrate design-for-manufacturing 2005-09-23
IBM, Chartered Semiconductor Mfg and Samsung Electronics Co. Ltd have entered into an initial set of solutions for their cross-fab, common design-for-manufacturability (DFM) initiative. The multi-faceted effort, which includes participation by electronic design automation (EDA) and DFM tool suppliers, is expected to offer a series of rules, models and utility kits that provide new levels of predictability and control to achieve working silicon faster and yield ramp more efficiently.  
Fujitsu rolls 65nm ASIC, SoC process 2005-09-23
Enabling the next wave of semiconductors, Fujitsu Ltd has rolled out its 65nm process technology for advanced ASIC and system-on-a-chip (SoC) designs.  


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Clive Maxfield Strange modes of transport and other "stuff"

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