| Cadence: India moves up the semiconductor design map
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2010-11-16 |
| Cadence's Rahul Arya outlines the agenda for CDNLive! India 2010 and discusses this year's global vs. India electronics design trends and demand. |
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| Ricoh, DeFacTo's ink licensing deal
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2010-11-04 |
| Ricoh Company Ltd has inked a licensing agreement with DeFacTo Technologies SA for the HiDFT-Signoff Design-for-Test solution. |
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| Cadence shows the holistic way to silicon realisation
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2010-10-29 |
| The approach is focused on offering products and technologies that deliver on the three requirements for a deterministic path to silicon: unified design intent, design abstraction and design convergence. |
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| SMIC adopts Cadence range for design solutions
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2010-09-21 |
| The semiconductor foundry will use Cadence products for design, verification and implementation from 65nm to 40nm |
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| NSA approves Virtex-5Q FPGA sol'n
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2010-09-14 |
| Key to the NSA approval of the Virtex-5Q solution for high-grade cryptographic processing |
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| 3M buys Cogent for Rs.4,429.17 crore
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2010-09-02 |
| In a definitive agreement 3M has agreed to acquire Cogent Inc. thus expanding its biometric market share for $10.50 per share and an aggregate value of approximately Rs.4,429.17 crore ($943 million). |
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| Magma Design Automation is the latest member of DFMC
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2010-08-30 |
| Magma Design Automation is the latest member of Si2's Design For Manufacturability Coalition (DFMC). |
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| Physical verification solutions aid 65nm transition
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2010-08-27 |
| Magma Design Automation Inc. unveils scalable physical verification solutions that offer fast turnaround time for designs at the 65nm node and below |
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| AUO verifies carbon footprint of PV module
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2010-08-26 |
| AU Optronics (AUO) achieves the completion of the carbon footprint verification on the multi-crystalline PV module EcoDuo PM220P00 |
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| KPIT Cummins partners Tensilica as SoC design centre
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2010-08-24 |
| KPIT Cummins has joined Tensilica's Xtensions partner network which will help customers bring feature-rich in-vehicle entertainment devices faster to market. |
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| Start-up specialises in FPGA-based prototyping technology
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2010-08-17 |
| InPA Systems Inc., a start-up emerges out of stealth mode today to flaunt a new technology that it has developed which compresses integration time from weeks into days. |
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| HCL, Daon partner to secure air travel with biometric sol'n
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2010-08-16 |
| HCL Technologies Ltd. (HCL) has formed a strategic partnership with Daon, a provider of biometric identity assurance software, to help aviation, transportation, government and public sector clients solve their identity programme challenges through biometric technology solutions. |
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| Magma tools verify TSMC's 28nm PQV chip test
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2010-08-12 |
| Magma's physical verification software—Quartz DRC has delivered sign-off accuracy for TSMC's 28nm product qualification vehicle (PQV) test chip |
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| Cadence extends its system realisation ecosystem to ARM
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2010-08-02 |
| Cadence has broadened its existing collaboration with ARM to create an ARM-optimised system realisation solution to streamline development time of ARM processor-based devices. |
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| CircuitSutra joins Cadence System realisation alliance
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2010-07-26 |
| CircuitSutra will provide standards based SystemC modelling services to create virtual prototypes of SoCs, leveraging a full range of resources to help it market and deploy innovative solutions. |
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| Hitachi steps up verification with Cadence Palladium TBA
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2010-07-22 |
| Hitachi Ltd engineers successfully implemented a new system-level verification environment for Ethernet routing/switching products using the Cadence Incisive Palladium transaction-based acceleration technology |
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| Open-Silicon boasts 100% IP-silicon integration
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2010-07-12 |
| Synopsys Inc. has revealed that Open-Silicon has licensed and integrated 50 high-speed DesignWare IP products into customers' chips with 100 per cent first-pass silicon success. |
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| EDA well-positioned to ride the electronics wave
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2010-07-08 |
| Change is inevitable as design teams face shrinking resources, shorter timelines and mounting complexity. EDA might well be able to ride the expected electronics wave. |
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| MathWorks' coder achieves TÜV SÜD certification
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2010-07-05 |
| MathWorks' Simulink PLC coder has achieved TÜV SÜD certification which will aid engineers develop high-integrity control system software in compliance with IEC 61508 and IEC 61511. |
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| MindTree adopts Mentor's verification platform
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2010-06-29 |
| MindTree has joined Mentor Graphics' Questa Vanguard Programme and adopted a verification flow based on Mentor's Questa functional verification platform and the Open Verification Methodology |
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| IBM to produce Infineon secure ICs for e-passports
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2010-06-25 |
| Infineon Technologies AG has tapped IBM Corp. to manufacture its highly secure ICs for secure identification applications, including electronic passports. |
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| AMD uses Apache power noise, sign-off tools
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2010-06-24 |
| AMD has chosen Apache as their global supplier of power supply noise and reliability sign-off products. |
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| Viewpoint: Reducing your debug efforts
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2010-06-24 |
| Debug gets your attention one way or another. Give it attention early in the development cycle to reduce the amount of time you spend on it later and in future designs. |
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| AMIQ signs up EDAcon for Asia, Israel DVT sales
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2010-06-17 |
| AMIQ EDA s.r.l. has outsourced its Design and Verification Tools (DVT) product line sales activities in Asia and Israel to EDAcon Partners Ltd |
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| Synopsys bags high-level synthesis tech
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2010-06-16 |
| In a move that strengthens its position in system-level design and verification and enhances the company's FPGA-based prototyping solutions, Synospys, Inc. has acquired assets of Synfora, Inc., a provider of C/C++ high-level synthesis tools |
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| Cadence's Ahuja discusses EDA360 vision
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2010-05-31 |
| Cadence Design Systems Inc. recently launched a global initiative called the EDA360 to counter the threat of profitability gap that faces the EDA industry. Cadence India's Jaswinder Ahuja discusses the EDA360 vision with EE Times India. |
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| Cadence, IBM team on high performance IPs
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2010-05-28 |
| Cadence Design Systems, Inc. and IBM have signed an agreement to develop DDR PHYs, memory controllers, and protocols such as PCIe and Ethernet under 32-nanometer silicon-on-insulator. |
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| Open integration platform ups SoC realisation
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2010-05-19 |
| Cadence debuts its Open Integration Platform that has Cadence's mixed-signal (analogue and digital) design, verification and implementation products and solutions as its underpinning |
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| Cadence buys Denali
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2010-05-17 |
| Cadence Design Systems Inc. will acquire Denali Software Inc. for Rs.1,454.58 crore ($315 million) in cash. |
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| Mentor's tech lowers Wipro's time-to-market
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2010-05-14 |
| Wipro Technologies is increasingly adopting Mentor Graphics design automation tools and technologies in their design programs for customers as it reduces design cycles by 40%. |
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Strange modes of transport and other "stuff"
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