| Lattice validates Aldec"s simulators for its devices
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2006-05-17 |
| Aldec Inc. has announced that Lattice Semiconductor Corp. has validated Aldec's Riviera and Active-HDL simulators for use with Lattice devices |
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| SystemVerilog fails to deliver on design
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2007-02-21 |
| SystemVerilog is widely applied to verification, however, design use lags due to concerns about tool support. |
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| Wrestling with functional verification
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2005-12-22 |
| When chip complexity reaches 10 million or 100 million gates, the answer may lie in rethinking both verification and design. |
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| Semtech adopts MathWorks for RF receiver dev't
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2011-11-15 |
| Semtech selects MathWorks' MATLAB and Simulink model-based design tools for accelerating development time of digital receivers for wireless RF devices by 33 per cent. |
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| Sub-$200 tools power 'farms' for verification
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2005-09-01 |
| Stanley Hyduke sees a not-so-distant future for the semiconductor industry in which companies are running thousands of simultaneous simulations to cope with the verification bottleneck. |
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| Partners to collaborate on processor compiler tools
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2009-12-15 |
| Lattice Semiconductor Corp. and Beyond Semiconductor will work together on the development of compiler tools for Lattice's soft processors. |
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| Cadence contributions to SystemVerilog standard recognised
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2006-03-22 |
| Cadence Design Systems Inc. has announced that the IEEE has recognized Cadence for its contributions to the IEEE 1800 SystemVerilog standard. |
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| Altera, Mentor partner on DO-254
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2008-08-21 |
| Altera and Mentor work together to develop tools and methodologies for use in creating DO-254-certifiable IP. |
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| Embedded design enters a new age
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2008-12-19 |
| Open source licensing of soft microprocessors provides designers the flexibility to change FPGA architectures and the visibility into the processor architecture that they need. |
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| Synplicity, Actel extend OEM agreement
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2006-05-04 |
| Synplicity Inc. and Actel Corp. have expanded their OEM agreement to deliver 'exceptional value and a deep, on-going technology roadmap' for Actel customers. |
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| The future of multi-threading
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2008-08-01 |
| The question still remains unanswered. Is multi-threading the best way to exploit multi-core systems effectively? |
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| Vendors support SystemVerilog synthesis
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2006-04-19 |
| Synthesis vendors are strongly supportive of a proposed standard SystemVerilog synthesis subset. |
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| Hitachi steps up verification with Cadence Palladium TBA
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2010-07-22 |
| Hitachi Ltd engineers successfully implemented a new system-level verification environment for Ethernet routing/switching products using the Cadence Incisive Palladium transaction-based acceleration technology. |
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| Duo combine forces for model based design workflow
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2010-03-31 |
| The MathWorks and Mentor Graphics have come together to provide guidance on an integrated workflow for DO-254 compliance using model-based design. |
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| Atrenta India shares design activity plans
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2006-10-30 |
| Sushil Chander Gupta, vice-president and managing director of Atrenta India, discussed with EE Times India the company's R&D operations at its Noida design centre, the enhancements planned for its product suite during the year, and the planned expansion of its design centre activity. |
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| Mentor releases support package for ARM Cortex-M3 processor
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2006-08-09 |
| Mentor Graphics Corp. has announced the availability of the first Mentor processor support package for the ARM Cortex-M3 processor. |
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| IEEE approves Cadence's 'e' language
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2006-06-01 |
| The IEEE has approved Cadence Design Systems Inc.'s "e" verification language, making it an open standard that anyone can use or support. |
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| Mentor, QuickLogic sign OEM agreement
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2006-01-02 |
| Mentor Graphics Corp. has announced the signing of a multi-year OEM agreement with QuickLogic. The agreement offers QuickLogic's customers a powerful synthesis solution, and provides for a smooth and easy transition to the full range of advanced FPGA synthesis technology and tools from Mentor Graphics. |
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| Renesas to license SMSC's IP for digital content
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2005-11-07 |
| SMSC and Renesas Technology Corp. have reached a licensing agreement enabling Renesas to incorporate SMSC technology providing Digital Transmission Content Protection (DTCP) for DVD audio and video, including copy-protected DVDs. |
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| Structured ASICs- an attractive option for custom IC design
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2007-09-03 |
| Given the increasing NRE charges and long design schedules associated with deep-submicron standard-cell ASICs, the use of structured ASICs for custom IC design is an increasingly attractive option.. |
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| Summit Design launches IP initiative
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2006-07-13 |
| Summit Design Inc. has launched its Intellectual Property (IP) Initiative, which aims to address IP interoperability issues at the system level. |
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| Partnership simplifies FPGA, PCB design collaboration
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2007-05-25 |
| Zuken, Aldec partnership to help facilitate collaboration between FPGA and PCB designers, would allow layout engineers to perform pin swaps that concurrently update all PCB and FPGA design data. |
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| Mentor Graphics acquires Summit Design
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2006-10-27 |
| Mentor Graphics Corp. has acquired Summit Design for an undisclosed sum. The purchase gives Mentor an ESL line-up that includes C language design, synthesis, verification, and code coverage. |
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| Altera launches OpenCL programme for FPGAs
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2011-11-17 |
| Altera announces what is claimed as the industry's first OpenCL programme for FPGAs to speed up multi-core system development. |
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| Forte, Summit collaborate on design, verification flow
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2005-12-06 |
| Forte Design Systems and Summit Design have collaborated to deliver an integrated solution that combines the strengths of the Vista SystemC IDE and Cynthesizer SystemC synthesis products. |
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Strange modes of transport and other "stuff"
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