| IBM, AZ research next-gen litho pattern techniques
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2010-12-23 |
| IBM Research-Almaden is working with AZ Electronic Materials (AZ) on the development of materials based on block copolymers aimed at Directed Self-Assembly (DSA) processes. |
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| EUV hits another hurdle in inspection tools
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2010-04-08 |
| EUV has hits another hurdle in the form of inspection tools as Sematech researcher Bryan Rice confessed that the industry still does not have them despite a lengthy R&D effort. |
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| 3D patterning tech has an edge over e-beam litho
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2010-04-26 |
| IBM Research plans to use the 3D patterning technique for prototyping nanoscale CMOS electronics, optical components and meta-materials. |
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| RAPID technique advances nanofabrication process
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2009-04-16 |
| A research team has developed a technique that creates smaller computer chip features without the use of ultraviolet light. |
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| Nikon plans to revive fab tool business
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2010-06-25 |
| Nikon has formulated a three-year medium term management plan that will run from fiscal 2011 to 2013. One of the goals is to bring the fab tool business back in the black. |
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| Intel CEO: More SoCs than CPUs coming soon
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2009-09-24 |
| Intel will someday ship more SoC devices than PC processors, according to CEO Paul Otellini's keynote at the Intel Developer Forum. |
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| Chipmakers gear up for double-patterning
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2008-07-22 |
| ASML, Canon and Nikon are racing each other to capitalise on the shift towards double-patterning tech at the 32nm node. |
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| Industry favours 193nm immersion, EUV litho in survey
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2010-06-04 |
| A survey of technologists attending the Sematech Litho Forum revealed industry hails 193nm immersion double patterning and EUV as technologies to consider for manufacturing at 32nm and beyond. |
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| Fab technologies on the spotlight
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2008-10-15 |
| Here are the 10 fab technologies that stand to make or break the future of IC production. |
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| GlobalFoundries beats TSMC on tech, analyst says
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2009-08-11 |
| GlobalFoundries (GF) might be not a leader in terms of volume, but in any case, it is a leader in terms of technology, according to Gartner analyst Bob Johnson. |
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| NIL, Oxford team to develop etch steps for nanoimprint tech
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2007-09-25 |
| Oxford Instruments combined its expertise in plasma etching with NIL Technology's experience developing templates, stamps and processes to create methods for etching the nanoimprinting stamps in fused silica. |
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| An insider perspective of the semi industry
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2008-11-17 |
| Here's how chips are made, why ASICs cost so much, and what drives the industry to smaller process nodes. |
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| Design, manufacturing worlds collide at Bacus
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2005-10-11 |
| If there was a shred of doubt remaining about the magnitude at which IC design and manufacturing convergence is taking place, it was laid to rest last week (Oct. 3-7) at the 25th annual Bacus Photomask Technology symposium in Monterey, Calif. |
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| SanDisk: NAND is at the crossroads
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2009-08-20 |
| SanDisk Corp. founder, chairman and CEO Eli Harari warned that the NAND industry is at the "crossroads," as there is a "disconnect" between future capacity requirements and demand. |
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| Toppan Photomasks to expand production
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2006-07-12 |
| Toppan Photomasks Inc. has plans to expand its photomask production plant in Shanghai, adding capacity to produce photomasks for 180nm ICs. |
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| Partnership pushes nanoimprint litho
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2009-07-09 |
| Dai Nippon Printing and Molecular Imprints aim to develop mask replication tech for the 22nm half-pitch node. |
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| Semicon industry's top 10 challenges
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2009-07-09 |
| As it always seems to, this year's Semicon West tradeshow arrives at a critical time when the industry is faced with a number of looming questions. |
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| IBM researchers invent nanoprinting technique
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2007-09-24 |
| IBM researchers have invented a nanoscale printing technique that can deposit metals, semiconductors and oxides directly onto substrates with single nanoparticle accuracy. |
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| Intel lists challenges for chip scaling
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2009-02-12 |
| At the ISSCC, Intel's Mark Bohr listed five major stumbling blocks for the 32nm node and beyond. |
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| ASML debuts hyper NA immersion
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2005-08-16 |
| The XT1700i is ASML's answer to Nikon's efforts in the hyper numerical aperture market. |
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| IMEC, CNSE collaborate to boost EUVL
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2008-01-23 |
| Belgian research group IMEC and the CNSE of the University at Albany in New York have collaborated to carry out EUVL experiments as a means to accelerate the introduction of EUVL into manufacturing. |
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| 10 tech to change electronics landscape in 2010
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2009-11-23 |
| EE Times lists emerging technologies that have potential to change the electronics landscape in 2010. |
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| DNA scaffolding delivers tiny circuit boards
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2009-08-19 |
| Researchers have developed a way to use DNA origami structures with current chip manufacturing equipment. |
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| ARM exec calls for lower power consumption
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2009-10-16 |
| ARM president Tudor Brown noted the company's regarding power consumption on the next-generation chip design. |
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| Synopsys, NGR to enable more accurate OPC model-building
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2007-04-20 |
| Synopsys and NanoGeometry Research announced they have partnered to enable faster, more accurate, more predictive optical proximity correction (OPC) model-building at 45nm and beyond. |
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| UMC validates high-k process at 45nm
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2008-11-27 |
| UMC has validated its high-k metal gate process with a test SRAM design run at the 45nm node. |
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| TSMC addresses issues
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2010-03-02 |
| At the TSMC Japan Executive Forum in Yokohama, Shang-Yi Chiang, senior VP of R&D at TSMC, addressed several issues such as 40nm yields, high-k, litho issues about the silicon foundry giant. |
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| Source mask optimisation ignites debate
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2009-03-03 |
| Some say the term "source mask optimisation" is being used for marketing purposes by a number of companies hawking fundamentally different technologies. |
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| Was EUV the wrong bet for the industry?
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2010-03-25 |
| If so, what should it be working on instead? And who will benefit in the long run? Litho experts and executives deliberate on these hot questions. |
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| Manufacturing moves into IC design flow
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2005-12-01 |
| Clear Shape is preparing a technology that will bring 'design manufacturability check' models into the IC design flow, along w.ith tools to help optimize designs so they won't have problems with optical proximity correction (OPC) or manufacturing. |
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Strange modes of transport and other "stuff"
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