| VLSI conference tackles 2010 design challenges
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2009-12-28 |
| Dr. Mahesh Mehendale, general chair, International Conference on VLSI Design, talks about the event in 2010. Mehendale is director, Centre of Excellence for Digital Video, TI India, and the only TI Fellow in Asia. |
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| Why voltage-aware verification strategy counts
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2009-11-25 |
| Low-power designs are here to stay. A more robust verification strategy is to incorporate a voltage-aware, assertion- and coverage-based verification strategy that includes extensive power-on-reset and firmware tests. |
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| Amimon shifts product focus to notebook PCs
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2009-11-20 |
| Amimom makes a strategic change in its business model from living-room TV to PCs to recover from Sony loss. |
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| Mathworks brings 'model-based design' to India
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2009-07-16 |
| To gain insight into application trends and challenges, Vivek Nanda at EE Times India interviewed managing director Kishore Rao of Mathworks India Pvt. Ltd in Bangalore and industry marketing manager Arun Mulpur in Natick, Massachusetts. |
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| The problem with massively parallel chips
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2009-06-08 |
| Companies that make massively parallel chips and tools will have to grapple with "stickier" software |
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| DSPs reembrace multi-core architecture
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2008-11-03 |
| DSPs are reembracing multi-core architectures for specific applications possessing well-partitioned processing tasks. |
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| Barriers to MEMS commercialisation
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2008-10-23 |
| A major barrier to MEMS commercialisation has been the lack of design for manufacturing and test strategies. |
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| Avoid design issues with package-aware I/O planning
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2008-10-07 |
| Chip designers must consider package routability, power delivery and I/O behaviour during the initial I/O planning process. |
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| On-chip multi-processing steps up
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2008-09-18 |
| SoC design components now mean on-chip symmetric multi-processing under a single OS. |
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| The future of multi-threading
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2008-08-01 |
| The question still remains unanswered. Is multi-threading the best way to exploit multi-core systems effectively? |
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| Implement an FPGA ASIC prototype
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2008-06-16 |
| ASIC designers think they can best meet their requirements by prototyping the functional equivalents of their designs as FPGAs. |
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| Next SoC era seeks for new tech, business models
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2007-11-13 |
| In the next phase of the SoC era, system, software and IC companies are seeing the promise for using multicore devices to open up fresh markets. But the big question is how to define chip-level platforms |
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| Multicore shakes up EDA industry
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2007-07-16 |
| The EDA vendors accept that though multi-core platforms provide much-needed compute power as transistor counts soar at 65nm and below, but they can prove a cause of concern for legacy apps that could be difficult or even impossible to parallelise. |
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| Multi-core pushes RTOS, tool revisions
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2007-05-17 |
| RTOS and tool providers are improving model-driven design, virtual prototyping and C-language compilation to spur multi-core programming and debugging. |
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| Dearth of tools, expertise slows multi-core progress
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2007-05-16 |
| The progress of multi-core ICs are slowing down due to lack of parallel-programming tools needed to program and debug multi-core ICs, said Anant Agarwal. |
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