| Magma, Chengdu ICC open joint IC design lab
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2010-03-15 |
| Magma Design Automation and Chengdu ICC (CDICC), have established a joint IC design lab to help IC design companies meet the demands of the international semiconductor market. |
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| EC sets up task force for nanoscale memory project
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2010-02-26 |
| The European Commission has established a taskforce to design future microchip memories and the project is expected to last three years. |
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| Duo provides training programmes for India engineers
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2010-02-12 |
| Honeywell partners Equinox to provide specialised training programmes for process engineers and chemical engineering students in India. |
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| Optimism marks 2010 EDA forecasts
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2010-02-05 |
| EE Times lines up estimates and predictions of EDA gurus Walden Rhines, Gary Smith, and Joseph Borel for this year's EDA market. |
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| Simulation tool boosts performance up to 100x
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2010-02-04 |
| Virginia Tech team's faster simulation tool for SystemC based hardware models bags the best paper award at the 15th Asia and South Pacific Design Automation Conference (ASP-DAC |
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| Infineon exec addresses IDM challenges in wireless sector
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2010-02-02 |
| At the recently-held VLSI conference, Hermann Eul, member of the management board, Infineon Technologies AG Deep delivered his keynote on deep sub-micron CMOS technology. |
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| Outlook: Cloud computing will redefine information, process use
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2010-01-28 |
| Vipin Gupta at Empyra.com Inc. tells Vivek Nanda the next decade will redefine how we use and build information technology driven processes. He talks about the challenges and opportunities facing the cloud computing market. |
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| Fujitsu, A*STAR partner on petascale computing
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2010-01-22 |
| Fujitsu and A*STAR have formed an R&D partnership to develop advanced applications technologies for petascale computing. |
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| Tech, tech practice to boost 2010 engineering success
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2010-01-14 |
| Mathworks India Pvt. Ltd managing director, Kishore Rao has identified parallel language, early verification with Model-Based Design as cornerstones of engineering success in 2010. |
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| Partners to collaborate on processor compiler tools
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2009-12-15 |
| Lattice Semiconductor Corp. and Beyond Semiconductor will work together on the development of compiler tools for Lattice's soft processors. |
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| Why voltage-aware verification strategy counts
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2009-11-25 |
| Low-power designs are here to stay. A more robust verification strategy is to incorporate a voltage-aware, assertion- and coverage-based verification strategy that includes extensive power-on-reset and firmware tests. |
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| Intel Exascale R&D centre rises in France
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2009-11-23 |
| Intel has committed to support and create the European Exascale Computing Research Centre with French R&D organisations. |
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| 3D Web development critical to HPC growth
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2009-11-20 |
| Justin Rattner, chief technology officer at Intel, said that the needs of the 3D Web hold the key to the growth of high-performance computing. |
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| Global conference series makes a pit stop at India
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2009-11-17 |
| EE Times-India caught up with Rahul Arya, marketing and technical sales director at Cadence Design Systems (I) Pvt. Ltd, to discuss India's domestic semiconductor industry and to find out what Indian engineers should expect at the CDNLive!. |
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| New method detects chip flaws during design
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2009-09-01 |
| A new method that harnesses an electronics failure simulation technique enables engineers to detect design flaws resulting in cracks, fractures and interface faults before chip fabrication |
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