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EE Times India - total search 46 articles sort by date sort by relevance
64bit simulator runs 10x faster without FPGA tools 2010-01-22
From SynaptiCAD comes the first 64bit Linux version of VeriLogger Extreme, a Verilog simulation and debug environment which is 30 per cent faster than the 32bit version.  
Dev't board prototypes designs in a snap 2009-09-23
Altium rolls a new FPGA-based development board that eases instant prototyping of electronic designs.  
Multiprocessor tool suite gets upgrade 2009-06-22
Multiprocessor design firm 3L has introduced version 3.2 of its Diamond multi-processor tool suite.  
Platform delivers faster verification 2009-04-13
Synopsys Inc. has unveiled the latest generation of its Discovery Verification Platform.  
Serdes-capable FPGAs tout low power consumption 2009-02-26
The LatticeECP3 line is aimed to pre-empt new, mid-range introductions from Altera and Xilinx.  
FPGA-based I/O XMC card rolls 2009-02-19
The XMC-FPGA05D combines a user-programmable FPGA and configurable I/O on a single compact, rugged card.  
CPLDs tout small form factor 2008-12-16
Lattice Semiconductor has announced new, small-footprint packages for their ispMACH 4000ZE CPLDs.  
Aldec rolls out ALINT 2008.10 2008-12-11
Aldec Inc. says ALINT reduces risk when developing complex multi-million gate ASICs.  
Software tools extend support for nano FPGAs 2008-12-11
Libero IDE 8.5 also offers high-speed multiplier instantiation for RTAX-DSP applications.  
Aldec unveils Riviera-PRO 2008.10 2008-11-19
The Riviera-PRO 2008.10 is an HDL mixed-language simulator for multi-million gate ASIC and FPGA designs  
Altera enhances Quartus II software 2008-11-05
Altera has unveiled Quartus II software version 8.1 for CPLD, FPGA, and HardCopy ASIC designs.  
XMC/PMC module targets real-time apps 2008-10-14
VMETRO has introduced a new generation user programmable FPGA XMC/PMC module with fibre-optic transceivers.  
Standard improves AMS design 2008-08-26
Accellera announced that its Board of Directors and Technical Committee members approved Verilog-AMS 2.3.  
Tool suite simplifies design process 2008-08-07
Actel announces new power reduction and design creation enhancements to their Libero IDE.  
DSP builder improves designers' productivity 2008-07-02
Altera rolled its DSP Builder tool version 8.0, featuring second-generation model-based synthesis technology.  

Embedded Design India - total search 11 articles
Simulation debugging using triple speed Ethernet testbench 2009-12-18
Unifying hardware, software verification 2009-03-05
Embedding 1-Wire Master into ASIC 2008-12-22
Using the embedded JTAG ACE player 2008-11-10
Back to the language roots 2005-01-02
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Power Design India - total search 1 articles
Power-Sensitive Design Techniques On FPGA Devices 2001-07-03
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EE Times Asia - total search 286 articles
64bit simulator handles larger designs 2010-01-22
FPGA-based dev't board eases prototyping 2009-09-23
Altera, Peking U open joint EDA/SOPC Lab 2009-08-17
Tool suite speeds up multiprocessor apps design 2009-06-22
65nm FPGAs, clock ICs defy downturn 2009-02-26
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