| Synopsys testbench solution increases verification productivity
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2005-09-30 |
| Synopsys announced Discovery Pioneer-NTB, a new SystemVerilog testbench automation tool that claims to increase verification productivity and improve the quality of complex SoC and IP designs |
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| Cadence unveils UCVs-line of reusable verification IP
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2006-08-14 |
| Cadence Design Systems Inc. has introduced the UCVs, a new line of reusable VIP that integrates compliance management and mixed-language flexibility with advanced simulation-based testbench technology |
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| Tool enables full-chip assertion synthesis
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2010-05-11 |
| EDA start-up NextOp rolls out initial product, dubbed BugScope, a full-chip assertion synthesis product that automatically generate functional coverage properties from testbench and RTL |
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| Altera offering x8 PCI Express core for Stratix II
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2005-11-04 |
| Altera Corp. released an x8 PCI Express MegaCore function optimized for its Stratix II GX FPGAs. |
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| cJTAG-IEEE 1149.7 IP core debuts
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2008-09-02 |
| IPextreme announced the first synthesisable IP core that implements IEEE 1149.7 standard. |
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| Simulator supports Open IP Encryption
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2006-07-14 |
| Aldec says its new version of the Riviera simulation tool supports design flows based on Synplicity's Open IP Encryption Initiative. |
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| PLDA launches 'first' FPGA-based devt kit
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2006-08-08 |
| PLDA has announced launch of the PXIe XpressLite CY2 Development Kit for CompactPCI Express. |
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| Synthesis tool eases SoC design verification
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2011-01-31 |
| Jasper Design Automation's ActiveProp property synthesis tool eases assertion-based verification for SoC designs. |
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| Mixed-signal verification tool automates regression
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2011-04-25 |
| Synopsys introduces the CustomExplorer Ultra offering productive mixed-signal simulation and regression management environment for complex system-on-chip (SoC) verification. |
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| Cadence unveils 'first' transaction-based system verification
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2006-06-21 |
| Cadence Design Systems Inc. has unveiled its 'first' automated end-to-end transaction-based system verification and management solution. |
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| IC emulator handles 10 crore gates at 20MHz
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2007-01-24 |
| EVE SA has claimed to have developed the largest and fastest IC emulation product to date. ZeBu-XXL handles up to 100 million gates at up to 20MHz. |
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| Synthesis tool simplifies ANSI C code conversion
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2006-12-06 |
| Catalytic Inc. is rolling out a synthesis tool that converts Matlab code into ANSI C code. By automatically generating C, the MCS tool claims to eliminate the traditional process of manual translation. |
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| Cadence expands system-level VIP portfolio
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2008-11-05 |
| Cadence also expanded its SpeedBridge Adapters to boost acceleration and emulation performance. |
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| C++ verification class library rolls
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2007-02-23 |
| Jeda Technologies is introducing NSCv, a C++ verification class library for SystemC. The offering supplements the open-source SystemC Verification Library (SCV) with functional data coverage, dynamic threading and memory management capabilities. |
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| IP platform, evaluation kit aims at ARM Cortex-M0 systems
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2010-12-09 |
| Cast Inc. debuts a JumpStart program and evaluation kit that works with the ARM DesignStart online IP portal to help designers develop systems around ARM Cortex-M0 processors. |
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| Verification advancements ease ASIC, FPGA design
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2011-01-14 |
| Cadence Design Systems Inc. revealed advancements that increase verification productivity, including a new release of Cadence Incisive technology. |
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| Platform delivers faster verification
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2009-04-13 |
| Synopsys Inc. has unveiled the latest generation of its Discovery Verification Platform. |
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| Verilog simulator offers faster RTL simulation
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2007-01-09 |
| Graphical debugging tool provider SynaptiCAD has released VeriLogger Extreme, a compiled-code Verilog 2001 simulator, priced at Rs.1.81 lakh ($4,000) on Windows platforms. |
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| TBX eases co-verification for embedded systems
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2008-01-24 |
| Mentor has announced what it claims as the industry's only commercially proven RTL-accurate virtual emulation capability that eliminates the traditional barriers of adopting hardware in-circuit emulation for system-level integration. |
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| Web IP configuration tool for IC designers debuts
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2007-10-23 |
| Think Silicon has developed an online IP configuration platform for the generation of parametrisable IP modules than can be used in semiconductor devices.. |
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| GateRocket rolls device-native verification for FPGAs
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2007-04-25 |
| Start-up GateRocket is offering a device-native FPGA verification tool that includes hardware and software. |
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| Engineers launch free open source website for C++ verification
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2006-09-06 |
| Two engineers have co-authored a book and have launched a website with open-source tools that can help IC verification teams with C++ verification. |
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| Made in India: Tool simplifies verification automation
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2009-03-05 |
| Axiom offers what it calls "new breed of functional verification tool" with its CDF tool suite, developed by its India team. |
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| PCIe 2.0-compliant FPGAs boast low power
|
2009-07-31 |
| The Virtex-6 FPGA family is expected to accelerate mainstream development of PCIe 2.0 systems. |
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Strange modes of transport and other "stuff"
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