| Verification with pattern generator
|
2008-04-15 |
| Byte Paradigm has introduced the Wave Generator Xpress, a PC-controlled arbitrary digital waveform generator (pattern generator) targeting ASIC, FPGA, DAC and digital board verification and characterization |
|
| Tools bridge chip design, verification with shared database
|
2010-06-04 |
| Jasper's upgraded ActiveDesign and JasperGold tools bridge chip design and verification by sharing a common, persistent knowledge base |
|
| ArchPro launches multi-voltage verification tool
|
2007-05-24 |
| ArchPro's MaVeric software verifies a multi-voltage design through an architecture-based, multi-voltage profiling and "Electrically Accurate" verification |
|
| S2 touts verification tool for embedded software devt
|
2007-12-03 |
| S2 Technologies has released Verification-as-Services solution that enables software devt teams to use their own processes while S2's underlying platform creates a shared framework that can be used across all stages of the release cycle |
|
| Synthesis tool eases SoC design verification
|
2011-01-31 |
| Jasper Design Automation's ActiveProp property synthesis tool eases assertion-based verification for SoC designs |
|
| Formal verification tool provides fine control over thoroughness
|
2006-07-27 |
| Averant Inc. has released the next generation of its formal verification tool, Solidify 4.0 |
|
| Tools aid embedded software quality verification
|
2010-10-22 |
| MathWorks enhances its Polyspace embedded code verification products that allow engineers to choose and track embedded software quality metrics and thresholds |
|
| Physical verification tools offer free trial
|
2009-05-08 |
| Magma Design Automation has introduced the Quartz DRC and Quartz LVS 2009.05 physical verification tools |
|
| Verification solution aids FPGA-based ASIC prototyping
|
2007-05-31 |
| Synplicity's Identify Pro verification tool provides full visibility into FPGA-based ASIC/ASSP prototypes enabling you to find and fix functional errors at speeds approaching that of the final device |
|
| C++ verification class library rolls
|
2007-02-23 |
| Jeda Technologies is introducing NSCv, a C++ verification class library for SystemC. The offering supplements the open-source SystemC Verification Library (SCV) with functional data coverage, dynamic threading and memory management capabilities |
|
| Verification sol'n eliminates JTAG pod connections
|
2011-05-30 |
| EVE integrates its hardware-assisted verification solution with the ARM VSTREAM Virtual Debug Interface eliminating the need for physical JTAG pod connections |
|
| SpringSoft adds verification tech to functional qualification
|
2011-05-16 |
| Springsoft has integrated an advanced technology platform to its Certitude Functional Qualification System that enables broader deployment of verification qualification methodologies |
|
| Platform delivers faster verification
|
2009-04-13 |
| Synopsys Inc. has unveiled the latest generation of its Discovery Verification Platform |
|
| Start-up unveils post-layout verification products
|
2009-05-14 |
| The products incorporate 3D tech to deliver a "Guaranteed Accurate" solution for full-chip, post-layout verification |
|
| Co-emulation modelling verification standard revised
|
2011-02-01 |
| Accellera, an EDA standards organisation has revised its verification standard with a version 2.1 of its Standard Co-Emulation Modelling Interface (SCE-MI) specification approved by its board of directors |
|
| Verification platform supports enterprise-wide deployments
|
2006-11-01 |
| S2 Technologies Inc. has released the STRIDE 2.0 embedded software verification platform, with enhancements to support enterprise-wide deployments |
|
| Verification box exceeds 200MHz speeds, ASIC gates
|
2007-02-01 |
| Gidel Ltd's Proc_SoC verification box claims to exceed verification speeds of 200MHz, thanks to a direct FPGA-to-FPGA interconnect scheme. It also claims to scale up to 10 crore ASIC gates. Until now, Gidel has been a provider of board-level products |
|
| EDA tool brings debug visibility for ASIC verification
|
2007-01-10 |
| Synplicity will shortly release details about TotalRecall, which it says will bring full debug visibility to FPGA prototypes used for ASIC verification. If successful, the technology could help FPGA prototypes rival far more expensive emulation systems |
|
| Cadence unveils 'first' transaction-based system verification
|
2006-06-21 |
| Cadence Design Systems Inc. has unveiled its 'first' automated end-to-end transaction-based system verification and management solution |
|
| Jasper gives away verification planning tool
|
2006-09-01 |
| The GamePlan Verification Planner provides a solution for systematic verification, enabling vital prioritization and progress tracking for each feature tested |
|
| Cadence intros Xtreme series for hardware verification
|
2006-09-14 |
| Cadence Design Systems Inc. has introduced the Cadence Incisive Design Team Xtreme III Systems, the next generation of the Incisive Xtreme series of accelerator/emulators within the Incisive functional verification platform |
|
| Made in India: Tool simplifies verification automation
|
2009-03-05 |
| Axiom offers what it calls "new breed of functional verification tool" with its CDF tool suite, developed by its India team |
|
| Aldec unveils co-verification solution for Actel FPGAs
|
2007-03-14 |
| Aldec has announced the release of CoVer, a Windows-based HW/SW co-verification solution for Actel's ARM-based FPGAs |
|
| Mixed-signal verification tool automates regression
|
2011-04-25 |
| Synopsys introduces the CustomExplorer Ultra offering productive mixed-signal simulation and regression management environment for complex system-on-chip (SoC) verification |
|
| Cadence, ARM announce functional verification kit
|
2006-07-06 |
| Cadence Design Systems Inc. and ARM have announced the Cadence Functional Verification Kit for ARM technology |
|
| Verification advancements ease ASIC, FPGA design
|
2011-01-14 |
| Cadence Design Systems Inc. revealed advancements that increase verification productivity, including a new release of Cadence Incisive technology |
|
| Synplicity unveils ASIC/ASSP verification solution
|
2007-06-13 |
| Synplicity's Confirma platform is a tightly integrated, hardware-assisted ASIC/ASSP verification solution that brings together hardware and software tools |
|
| Synplicity's new HAPS deliver faster verification
|
2007-09-27 |
| Synplicity's new HAPS product family leverages the Xilinx Virtex-5 LX330 FPGA, and on-board memory to deliver faster ASIC verification |
|
| Cadence verification kit targets wireless and consumer SoC design
|
2007-08-29 |
| Cadence Functional Verification Kit for wireless and consumer SoC design extends from block-level verification to chip- and system- level advanced verification and includes automated methodologies for implementation and management |
|
| Tool eases verification of MEMS devices
|
2012-02-02 |
| The CoventorWare 2012 software release increases 3D simulation capacity and accuracy to make the verification of complex integrated MEMS devices more efficient and more accurate |
|
Strange modes of transport and other "stuff"
|
|
|IIC-China
|
|
|Electronic Components|Computer Products|Trade Show Center
|Site Feedback|Site Map|Help|About Us|Contact Us|Terms of Use|Privacy Policy|Security Commitment