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EE Times India - total search 17 articles sort by date sort by relevance

An Introduction to active-HDL FSM	2001-03-22
This application note provides an introduction to the Active-HDL FSM (finite state machine) editor, while highlighting key features of the software and illustrating the steps required to create a state machine
An introduction to active-HDL Sim	2001-03-28
This application note provides a brief discussion to the Active-HDL Sim functional simulator. The discussion includes installing/uninstalling the simulator, creating an 1164/VHDL simulation model, the simulation process, and applying stimulus
Abel-HDL vs. IEEE-1076 VHDL	2001-03-20
This application note compares and contrasts the complexity and basic features of Abel-HDL with those of IEEE-1076 VHDL
Understanding the Warp report file for Ultra37000-devices	2001-03-30
This application note provides a comprehensive description of the report file generated by the Warp HDL synthesis tool for the Ultra37000 CPLDs
Using the embedded JTAG ACE player	2008-11-10
Here's a reference design consisting of HDL IP and ACE software utilities that give flexibility in creating ISP solutions
Getting started converting .ABL files to VHDL	2001-03-20
This application note is intended to assist Warp users in converting designs written in DATA I/O's ABEL 7 HDL to IEEE 1076 VHDL
Targeting Cypress PLDs from the Leonardo Spectrum Environment	2001-03-26
This application note discusses how designs created in Exemplar Logic's Leonardo Spectrum HDL synthesis tool can be targeted to Cypress Semiconductor's PLDs
Adding MCU into FPGA design	2010-11-30
Know how to instantiate an MCU directly into the HDL and used it immediately in a standard FPGA design flow without special scripts or complicated steps
Connecting Xilinx FPGAs to the Philips A-rate fiber-optic transceiver	2004-12-10
Connecting Xilinx FPGAs to the Philips A-rate fiber-optic transceiver
Simple MicroBlaze Microcontroller concept	2011-02-22
The Simple MicroBlaze Microcontroller (SMM) is a small form-factor 32-bit MCU based on the MicroBlaze processor that can be instantiated into an FPGA design.
Understanding chroma resampler	2010-12-02
Read about the implementation of six circuits necessary to perform commonly used conversions between various chroma formats.
Using the Ultra37000 ISR prototype board	2001-03-23
Using the Ultra37000 ISR prototype board
Simulation debugging using triple speed Ethernet testbench	2009-12-18
This application note shows how you can leverage the verification environment in the testbench provided in the Altera Triple Speed Ethernet MegaCore function to debug your system design.
Connecting Xilinx FPGAs to the Philips A-rate fiber-optic transceiver	2004-12-10
Connecting Xilinx FPGAs to the Philips A-rate fiber-optic transceiver
How to write efficient testbenches	2010-11-26
Here are some guidelines for laying out and constructing efficient testbenches. This document also provides an algorithm to develop a self-checking testbench for any design.
Embedding 1-Wire Master into ASIC	2008-12-22
1WM was created to facilitate host CPU communication with devices over a 1-Wire bus without concern for bit timing.
Verification of prototype-board schematics	2005-02-01
Learn how to achieve schematic verification by slightly modifying the DUT verification environment.

---total search 17 articles, total 1 pages, The 1 Page---

EE Times Asia - total search 308 articles

Software promises speedier FPGA design	2011-12-15
Altera initiates OpenCL program for FPGAs	2011-11-17
Overcome challenges of ASIC/SoC prototyping with FPGAs	2011-10-24
Agilent discusses Asia business, modular instruments	2011-09-29
DSP design allows complex FPGA algorithm implementation	2011-09-15
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