Implementing JTAG testing with MPEG2Lynx
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2001-04-25 |
| This application note describes what is needed to implement JTAG Testability (IEEE 1149.1-JTAG standard) on the MPEG2Lynx (TSB12LV41) 1394 Link Layer Controller |
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| Programming a Flash-based MSP430 using the JTAG interface
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2003-09-15 |
| This application note details the functions required to erase, program, and verify the memory module of the MSP430 flash-based microcontroller family using the JTAG communication port, as well as how to program the JTAG access fuse, available on all MSP430 devices |
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| Ways of extending JTAG.v module's functionality
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2008-09-29 |
| This application note discusses a couple of possible extensions to the jtag.v module |
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| Simplified programming of Altera FPGAs using a SCANSTA111/112 JTAG scan chain mux
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2009-12-30 |
| Many modern communication and networking systems incorporate a systemwide IEEE 1149.1 (JTAG) test bus. The test bus not only enables a comprehensive, life-cycle approach to system test, but it also offers a number of additional benefits to the system designer |
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| AVR060: JTAG ICE Communication Protocol
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2003-04-30 |
| This application note describes the communication protocol used between AVR Studio and JTAG ICE |
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| The serial-to-JTAG board for MAXQ processors
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2005-06-07 |
| This app note discusses the commands accepted by the Serial-to-JTAG board |
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| Examining JTAG, SPI and I2C
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2008-09-24 |
| This application note discusses three popular serial buses: JTAG, SPI, and I2C |
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| Simplified programming of Xilinx devices using a SCANSTA111/112 JTAG scan chain mux
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2010-01-06 |
| Many modern communication and networking systems incorporate a system-wide IEEE 1149.1 (JTAG) test bus. The test bus not only enables a comprehensive, life-cycle approach to system test, but it also offers a number of additional benefits to the system designer |
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| Programming FLASH through the JTAG interface
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2003-06-19 |
| The application note describes how to program Flash memories via the JTAG interface |
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| MSC81xx and MSC711x JTAG connectivity
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2009-09-02 |
| This application note describes the recommended JTAG connectivity for a single or multiple MSC81xx or MSC711x DSPs when using the Freescale CodeWarrior DSP TAP connector cable |
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| Using IEEE 1149.1 boundary scan (JTAG) with Cypress Ultra37000 CPLDs
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2001-03-23 |
| This application note provides an overview of the Boundary Scan Test (BST) implementation in the Ultra37000 CPLDs, and shows how to connect the devices in the JTAG chain for BST as well as ISR operations |
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| Programming the MAX1441 with a USB-to-JTAG interface board
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2010-09-14 |
| This application note describes the connection between the MAXQUSBJTAG-KIT board and the MAX1441 application board. |
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| A quick JTAG ISP checklist
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2002-06-28 |
| This application note describes a short list of considerations needed for optimum performance of ISP designs. The considerations apply to Xilinx ISP device families. |
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| Multiple-device JTAG configuration in the Cygnal IDE
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2003-06-24 |
| power |
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| Using the XC9500/XL/XV JTAG boundary scan interface
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2002-06-28 |
| This application note describes the XC9500/XL/XV boundary scan interface and demonstrates the software available for programming XC9500/XL/XV CPLDs. |
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| Structural system test via IEEE Std. 1149.1 with hierarchical and multi-drop addressable JTAG Port, SCANPSC110F
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2002-05-09 |
| This application note discusses a structural system test protocol and set of commands for built-in test at both the chip and board level. |
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| Using the embedded JTAG ACE player
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2008-11-10 |
| Here's a reference design consisting of HDL IP and ACE software utilities that give flexibility in creating ISP solutions. |
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| Multiple-device JTAG configuration in the Cygnal IDE
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2003-06-24 |
| power |
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| Philips LPC210x microcontroller family
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2004-06-18 |
| This app note demonstrates how to use the LPC210x secondary JTAG interface while debugging the user application |
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| In-circuit programming for the MAX16065-MAX16068 and MAX16070/MAX16071 flash-programmable system managers
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2010-08-16 |
| This application note provides the programming algorithm for both the SMBus and the JTAG buses |
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| ISP Introduction
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2002-12-06 |
| This application note provides an introduction on In-system programming and JTAG |
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| Using the PAC-Designer Software Development Kit
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2002-10-12 |
| This application note describes how to use the PAC-Designer Software Development Kit in order to utilize the design and JTAG programming capabilities of PAC-Designer |
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| Cascading ISR devices
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2001-03-23 |
| This application note provides a detailed explanation of how to chain multiple programmable and non-programmable JTAG devices, such as cascading the FLASH370i ISR CPLDs with themselves and with other devices |
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| Philips LPC210x microcontroller family
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2004-11-25 |
| This app note demonstrates how to use the LPC210x secondary JTAG interface, while debugging the user application |
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| Using multiple boundary scan port linker (BSCAN2)
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2009-10-28 |
| Although the primary goal of JTAG/IEEE 1149.1 is simplified testability, modern systems may contain more devices than is practical in many cases. Adding to this challenge are devices that have special restrictions or requirements that may limit test procedures |
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| Wind River Workbench, on-chip debugging software
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2008-10-07 |
| Learn how to unlock the power of today's microprocessor technology through Wind River Workbench. |
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| In-circuit programming for MAX16046–MAX16049
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2009-01-15 |
| Read about MAX16046–MAX16049 system managers which can be programmed after being soldered to the application circuit board. |
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| Wind River ICE for hardware/software dev't process acceleration
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2008-10-07 |
| Wind River ICE is a debugging tool with broad processor and target operating system support. |
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| Connecting Xilinx FPGAs to the Philips A-rate fiber-optic transceiver
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2004-12-10 |
| Connecting Xilinx FPGAs to the Philips A-rate fiber-optic transceiver |
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| Low power design with CoolRunner-II CPLDs
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2002-06-28 |
| Low power design with CoolRunner-II CPLDs |
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Strange modes of transport and other "stuff"
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|IIC-China
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