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EE Times India - total search 184 articles sort by date sort by relevance

New techniques for fault diagnosis and isolation of switched mode power supplies	2002-04-18
New techniques for fault diagnosis and isolation of switched mode power supplies
Crosstalk measurement, extraction and validation in 10Gbps serial systems	2008-07-22
This paper provides a process to extract accurate connector crosstalk models.
Connecting Xilinx FPGAs to the Philips A-rate fiber-optic transceiver	2004-12-10
Connecting Xilinx FPGAs to the Philips A-rate fiber-optic transceiver
Edge rate ERM8/ERF8 series 10mm stack height Final Inch designs in PCI Express applications generation 2 - 5.0Gbps	2008-07-23
The performance of an actual PCI Express interconnect is highly dependent on the implementation.
Choosing the appropriate component from data sheet ratings and characteristics	2001-05-24
Choosing the appropriate component from data sheet ratings and characteristics
Implement trellis termination, tail biting	2010-11-24
Know about different termination techniques used in several communication standards using Veterbi decoder.
High-speed BUS LVDS clock distribution using the DS92CK16 clock distribution device	2000-11-30
The high data rates in today's systems require extremely low
Telecom Application Solutions	2003-05-26
Telecommunications Standards have been
Handling non-linear and time variant behaviour for high-speed serial buffer modelling	2008-09-18
Improved behavioural buffer modelling and statistical channel analysis have become crucial in PWB design.
Final Inch designs in PCIe apps	2009-03-12
Here's a measurement method applied to Final Inch designs and PCIe to help engineers deploy systems of two PCB cards mated through electrical connectors.
DN25 Series: Off-line 5V output non-isolated linear regulator	2002-05-06
DN25 Series: Off-line 5V output non-isolated linear regulator
Extracting and using J-models to estimate ACPR in direct conversion transmitters	2001-04-26
Extracting and using J-models to estimate ACPR in direct conversion transmitters
Average simulations of flyback converters with SPICE3	2002-04-16
Average simulations of flyback converters with SPICE3
Microchip's op amp Spice macro models	2009-12-10
This application note covers the function and use of Microchip's op amp Spice macro models.
Intel 860 chipset thermal considerations	2001-08-24
Intel 860 chipset thermal considerations
Reference design for 10GbpE	2009-02-13
The 10-Gbps Ethernet reference design provides an integrated Ethernet MAC, PCS, and PMA solution for Ethernet applications.
ST7 visual debug software key debugging features	2004-05-28
ST7 Visual Debug (STVD7) is a powerful, easy-to-use, integrated development environment (IDE)
Design ultra-low-jitter clock synthesiser	2009-03-18
Read about test results that show that the target jitter proved harder to attain than originally anticipated.
Implementing DDR2/mDDR PCB layout on the TMS320DM335 DMSoC	2010-01-25
This application note contains implementation instructions for the DDR2/mDDR interface contained on the TMS320DM335 Digital Media SoC (DMSoC) device.
Estimating junction temperature by top surface temperature in power MOSFETs	2010-03-02
The thermal data provided on MOSFET datasheets is usually limited to thermal impedance between junction-to-lead and junction-to-ambient.
Intel 810 chipset: Thermal design considerations	2001-08-24
Intel 810 chipset: Thermal design considerations
Metastability	2001-04-23
Metastability
Guide to DisplayPort PCB layout	2009-04-28
Here are guidelines for DP lane connection for the PCB traces, vias and AC coupling capacitors.
Digital pre-distortion, verification with SystemVue	2011-01-11
Learn about the concept behind digital pre-distortion (DPD), and know how to use the Agilent W1716 SystemVue DPD builder for hardware verification.
Turnkey solutions for retrofitting excitation systems	2002-05-09
Turnkey Solutions for Retrofitting Excitation Systems
LIN slave nodes with auto baud rate capabilities	2008-10-08
LIN slave nodes must be able to detect the baud rate of the master node and adjust their baud rate with 1.5 per cent maximum error.
Materials and practices application note	2005-06-02
Materials and practices application note
DC output errors in a fully-differential amplifier	2010-06-02
This application note gives a brief analysis and the results for DC output error calculations for a fully-differential voltage feedback amplifier.
Modeling current mode control boost converters	2010-12-29
Read about the design of current mode control boost converters operating in the continuous conduction mode.
Implementing DDR2 PCB layout on the TMS320DM646x	2008-07-30
Implement the DDR2 memory controller interface contained in the TMS320DM646x DSP devices.

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EE Times Asia - total search 1748 articles

Hardware/software co-dev't with emphasis on software	2012-02-06
Employing IBIS-AMI models for serial channel simulation	2012-01-25
Electronics trends in Asia: Opportunities and challenges	2012-01-19
Address hardware/software integration issues with combined prototyping solutions	2012-01-11
Boost SDR performance	2012-01-04
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