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EE Times India - total search 58 articles sort by date sort by relevance

PRBS mode setup for MAX9257/MAX9258 eval kit	2009-06-23
This application note details how to use the internal BER testing (BERT) feature of the MAX9257/MAX9258 Serdes in its pseudorandom bit sequence (PRBS) mode.
ISP1581 USB-to-ATAPI bridge	2003-05-27
ISP1581 USB-to-ATAPI bridge
Exploring Tiny InterNet Interfaces (TINI)	2003-09-19
Exploring Tiny InterNet Interfaces (TINI)
A printer adapter power supply for 90W peak with TEA1532	2004-11-25
POWER
Application of Philips P89LPC932 microcontroller on RF card reader ignition control	2005-06-09
Application of Philips P89LPC932 microcontroller on RF card reader ignition control
DN25 Series: Off-line 5V output non-isolated linear regulator	2002-05-06
DN25 Series: Off-line 5V output non-isolated linear regulator
A printer adapter power supply for 90W peak with TEA1532	2004-11-25
POWER
Fault detection of point-to-point radios	2002-05-03
Fault detection of point-to-point radios
SuperHyway provides SoC backbone	2000-12-01
Recent technology improvements have made it cost-effective to integrate components previously connected on a PCB onto a single piece of silicon. These so-called system-on-a-chip (SoC) devices generally comprise most of the blocks commonly found on a computer motherboard plus some application-specific intellectual property (IP). This means design issues that were formerly the province of systems designers are now within the realm of the chip architect. As a result, interconnection schemes common at the system and network level, such as packet switching, must now be considered at the SoC level.
Interference Control during mixed-signal (analog and digital) board design	2004-11-30
Interference Control during
A simple current-sense technique eliminating a sense resistor	2001-09-19
A simple current-sense technique eliminating a sense resistor
LP2996 Evaluation Board	2003-05-11
The LP2996 evaluation board is designed to provide the
3GPP Long Term Evolution	2008-11-03
Read about the Long Term Evolution of UMTS being developed by the 3rd Generation Partnership Project.
SEU strategies for FPGA	2010-12-08
Know the strategies and representative calculations for handling single event upsets (SEUs), with an emphasis on reliability.
Current Ratings of Power Semiconductors	2003-06-27
power
Reference design for 10GbpE	2009-02-13
The 10-Gbps Ethernet reference design provides an integrated Ethernet MAC, PCS, and PMA solution for Ethernet applications.
Building Xtensa-based emulation system on Xilinx FPGA	2008-09-29
This application note describes how to map an Xtensa or Diamond core to an FPGA with a minimal on-chip system.
Internet Speaker with theDS80C400 Silicon Software	2003-06-28
Internet Speaker with theDS80C400 Silicon Software
Advanced Encryption Standard on configurable processors	2008-09-26
Learn about the AES cipher and illustrates how configurable processors speed up encryption and decryption.
Data encryption routines for the PIC18	2005-06-16
Data encryption routines for the PIC18
Understanding internal test pattern generation	2012-01-11
Here are examples of accessing Pattern Generator Control Registers to meet custom display requirements.
Turnkey solutions for retrofitting excitation systems	2002-05-09
Turnkey Solutions for Retrofitting Excitation Systems
AVR335: Digital Sound Recorder with AVR and DataFlash	2003-04-04
This application note describes how to record, store and play back sound using any
Using formality in LSI Logic's FlexStream design flow	2001-05-24
This application describes procedures and recommendations for using the Formality formal equivalence checking tool for Gate to Gate equivalence checking.
Combining G35 with WaveJudge for deep-level R1 protocol analysis	2008-10-03
This note explains how PHY layer can be decoded for exactly the WiMAX procedure of interest.
Measurement accuracy of the ZVK vector network analyzer	2002-10-28
This application note evaluates the measurement accuracy of the ZVK vector network analyzer.
Using formality for RTL-to-gate in LSI Logic's FlexStream design flow	2001-05-24
This application note describes procedures and recommendations for using the Formality formal equivalence checking tool for RTL-to-gate equivalence checking.
Reference factor between RF (referenced to sync top level) and VF	2003-06-29
This application note provides a calculation of the reference factor between RF and VF signals.

---total search 58 articles, total 2 pages, The 2 Page---

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EE Times Asia - total search 1944 articles

Understanding dynamic BTS/UE signals with wireless link analysis	2012-02-10
Electronics trends in Asia: Opportunities and challenges	2012-01-19
CSA opens HK testing, certification lab	2012-01-19
EDA posts 18% YoY sales growth	2012-01-16
Address hardware/software integration issues with combined prototyping solutions	2012-01-11
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