Guidelines for DSP development
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1998-09-01 |
| To develop DSP applications, a number of challenges must be overcome, ranging from which architecture to use to which tools will meet your needs. Early analysis is a key to meeting these challenges, as this article explains |
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Improve DSP performance with on-chip FFT
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2009-10-09 |
| This article mainly focuses on how having an on-chip filter/FFT engine can significantly help offload work from the DSP core resulting into MIPS savings, enabling more MIPS to be used to accommodate further post processing or to execute a different task |
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DSP power techniques help achieve faster design cycles
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2006-12-04 |
| Designing handheld, battery-powered systems that require DSP capability demands that a great deal of attention be paid to power consumption |
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DSP or FPGA? Choosing the right device
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2008-06-27 |
| There are a lot of factors to consider when deciding whether to use an FPGA or DSP. This article provides an insight into choosing the right device through design examples |
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Employ object-oriented MATLAB for DSP
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2009-02-20 |
| Know the object-oriented programming features of MATLAB and how they can be leveraged for DSP development |
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Optimising power consumption in embedded DSP applications
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2006-10-19 |
| What drives power consumption and how do you minimise it in embedded DSP design using runtime techniques |
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Next-gen VoIP and the role of DSP
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2008-11-25 |
| Learn how to choose a DSP platform that can meet the demands of high-definition voice applications |
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RISC/DSP convergence meets VoWi-Fi requirements
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2006-01-16 |
| Embedded RISC processors with DSP capabilities add device functionalities with minimal impact on power |
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DSP power techniques help achieve faster design cycles
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2006-12-04 |
| Designing handheld, battery-powered systems that require DSP capability demands that a great deal of attention be paid to power consumption |
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Improve DSP performance with on-chip FFT
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2009-10-12 |
| This article mainly focuses on how having an on-chip filter/FFT engine can significantly help offload work from the DSP core resulting into MIPS savings, enabling more MIPS to be used to accommodate further post processing or to execute a different task |
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Building RISC cores with DSP enhancements
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2005-12-16 |
| Merging DSP onto the main processor creates efficient system architecture with smaller area and lower power |
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Optimise power consumption in embedded DSP apps (1
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2008-10-23 |
| Read about up-front hardware design and power-saving techniques for DSP or dual-processors |
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Configuring A VLIW-DSP Core For Application Specific Requirements
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2001-07-03 |
| This paper describes an architectural approach to configurable and scalable VLIW DSP core for embedded systems |
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| Do DSP simulations in hardware
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2007-03-21 |
| The System Generator for DSP Ethernet hardware co-simulation interfaces provide convenient, high-bandwidth solutions for simulating video and image processing applications on the Xilinx ML402 platform |
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| DSP intellectual property strengthens supply chain
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2001-04-01 |
| The availability of high-performance programmable DSP intellectual property has the potential to upset the traditional balance of power in the high-volume, high-dollar OEM market |
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Analyse DSP algorithms in FPGAs fast with z-transform
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2006-09-17 |
| This article presents a simple, efficient methodology for analysing high-performance DSP algorithms using the z-transform to obtain predictable results |
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Ultra-low-power DSP design
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2007-08-30 |
| This article presents detailed power results for the optimization of a low-power DSP, specifically by tuning its algorithm, processor architecture, and memory system, as well as through clock gating |
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Next-generation VoIP and the role of DSP
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2007-06-11 |
| Emerging technologies such as high-definition voice are expanding the role of the IP phone. Here's how to choose a DSP platform that can keep up with the changes |
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Selecting memory controllers for DSP systems
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2008-08-18 |
| DSP system performance is often limited by I/O constraints. Here's how to make sure your memory system meets your latency requirements through virtual prototyping |
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Design embedded DSP software with multi-core SoCs (2
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2007-11-27 |
| This is the second instalment of a series that focuses on DSP software design using multi-core SoC architecture |
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A Full-Compliance MP3 Decoder Using DSP
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2001-03-26 |
| This paper describes the techniques used in the non-linear dequantization process of MP3 (MPEG audio, Layer III) decoding with the Motorola StarCore DSP (MSC8101 |
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Building DSP engines for wireless video apps
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2002-09-01 |
| Wireless video for PDAs is a distinct possibility, designers only need to customize VLIW DSP cores to push processors to the maximum |
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Designing a DSP-based DC-DC Switching Power Supply
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2007-02-14 |
| This paper concludes a two-part tutorial on DSP-based DC-DC digital control comparing two design methodologies: Direct Digital Design and Design by Emulation |
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Fixed-point DSP and algorithm implementation
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2006-10-25 |
| The article discusses the primary differences between conventional and DSP processors and how the latter allows for efficient implementation of signal processing algorithms |
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Testing and debugging DSP systems (3
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2007-03-08 |
| Read about how emulators control programs on the DSP through functions such as breakpoints and single-stepping |
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Testing and debugging DSP systems (4
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2007-03-15 |
| This article explains how to use breakpoints, event detectors and program traces to debug code in DSP systems |
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DSP system-level abstraction speeds up embedded video
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2008-10-29 |
| Advancements in development environments allow a high system level of abstraction that eases the development of video and DSP applications |
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DSP power management techniques speed up design cycles
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2006-12-01 |
| Designing handheld, battery-powered systems that require DSP capability demands that a great deal of attention be paid to power consumption |
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Optimising compilers and embedded DSP software
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2006-11-07 |
| Understanding the DSP architecture, the compiler, and the algorithms can help you speed up applications by an order of magnitude |
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A Highly Optimized DSP Architecture For WCDMA Baseband Processing
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2001-07-03 |
| This paper presents the architecture of the MSC8101 DSP designed for 3G wireless applications. It also presents the results of the real-time implementation of the symbol rate processing functions using the MSC8101 |
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