How to Choose the Right FPGA
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2007-01-18 |
| This article highlights some of the latest FPGAs and analyzes their specific features and tradeoffs to aid engineers in selecting the most appropriate FPGA for their application needs |
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| Using graph-based synthesis for FPGA timing closure
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2007-07-11 |
| The increased effects of routing on FPGA path timing requires EDA tools to understand physical properties of the target device and analyze designs during the placement process in order to achieve timing closure |
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| DSP or FPGA? Choosing the right device
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2008-06-27 |
| There are a lot of factors to consider when deciding whether to use an FPGA or DSP. This article provides an insight into choosing the right device through design examples |
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| Control a three-phase full-wave rectifier with an FPGA
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2006-11-02 |
| If your project has big-time power, you might want to consider using an FPGA to control your three-phase full-wave bridge rectifiers |
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| FPGA co-processors optimize car infotainment, telematics
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2004-11-01 |
| As entertainment electronics becomes a primary source of differentiation among luxury vehicles, carmakers can rev up their designs with FPGA co-processing |
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| Fundamentals of core-based FPGA design (Part 1
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2011-08-22 |
| The first instalment of this series provides an overview of FPGA processor core types—firm, hard and soft—and the pros and cons that need to be evaluated in the context of an embedded system's requirements |
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| Driving a 32-bit RISC in an FPGA
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2002-03-01 |
| This technical article describes an optimized 32-bit RISC processor capable of running up to at least 75MHz and occupies less than 40 percent of area in an FPGA |
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| Exploring FPGA selection and system design architecture
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2008-08-06 |
| Here's how to create optimised FPGA specifications that achieves performance, reliability and cost goals for use in production |
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| Employing clock gating in ASIC, FPGA designs
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2010-06-16 |
| Clock gating is a well-understood power optimisation technique employed in both ASIC and FPGA designs to eliminate unnecessary switching activity |
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| Custom FPGA-based emulators accelerate IC design
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2001-11-16 |
| The regular, hierarchical structure that can be created in a custom FPGA means you can compile designs on a single workstation 5 to 20 times faster than traditional emulators |
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| Find FPGA opportunities with unified design tools
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2008-07-16 |
| FPGAs are offering many opportunities to companies engaged in the development of new and exciting electronic products. Given a unified electronics design tool, it is possible to overcome the increasing management complexity of developing with modern FPGA devices and harness their benefits |
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| Achieve your design goal with FPGA synthesis tools
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2009-12-07 |
| Following sound design flow practices can help FPGA designers manage their projects effectively. Here's how FPGA synthesis tools can help you efficiently achieve your design goals |
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| Employ FPGA to accelerate medical imaging process
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2011-09-01 |
| Know how to use an FPGA platform and a high level synthesis tool called Impulse C to accelerate a statistical line of reaction estimation for a high-resolution PET scanner |
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| Implementation of FPGA signal processing datapaths for software defined radios
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2001-08-09 |
| This conference technical paper describes the uses and applicability of FPGA-based signal processors especially in the telecommunication industry for software defined radios |
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| Programming CPLD and FPGA code on the Intel PXA27x processor developer's kit
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2004-05-14 |
| This app note describes how to program the CPLD code and FPGA code on the Intel PXA27x processor developer's kit main board, the Intel PXA27x processor developer's kit daughter card, and the Intel PXA27x processor developer's kit PMIC (LDO) card (PMIC card |
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| Replace custom hardware using COTS technology with FPGA (2
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2007-12-14 |
| This article explores some design issues while developing a case for COTS hardware that includes a FPGA as a feasible and flexible way to replace custom hardware |
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| How to achieve fast timing closure on FPGA designs
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2006-03-01 |
| The increased effects of routing on FPGA path timing requires EDA tools that completely understand the physical properties of the target device and can analyse designs during the placement process in order to achieve timing closure |
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| FPGA-based designs call for better noise immunity
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2009-10-08 |
| Today's FPGA-based designs require improved clocking with greater immunity to power supply switching noise observed in real-world applications |
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| Automatically generated FPGA coprocessor accelerates algorithm
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2006-08-09 |
| Recent advances in C-to-FPGA design methodologies and tools facilitate the rapid creation of hardware-accelerated embedded systems |
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| Put a configurable 32-bit processor in your FPGA
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2007-05-01 |
| Employing a configurable processor within your FPGA gives you lots of options that may not have been available with a fixed microprocessor, particularly the ability to adapt to a wide variety of application requirements |
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| Speed-up FPGA design process with early defect discovery
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2006-02-16 |
| Having better upfront visibility into possible defects in HW/SW interaction can prevent the need for FPGA re-spins |
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| Increase visibility in FPGA prototypes and emulators
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2006-03-07 |
| The article suggests visibility enhancement techniques for FPGA prototypes and emulators that help locate, isolate and understand the causes of error symptoms |
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| The basics of constructing FPGA
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2008-01-01 |
| A sound knowledge of the FPGA development process enables technical leads, supervisors, managers, or systems engineers interface with FPGA designers more efficiently |
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| Building reliable FPGA memory interface controllers
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2006-04-19 |
| This how-to article discusses various memory interface controller design challenges and the use of MIG to build a complete memory interface solution for your own application on a Virtex-4 FPGA |
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| Speeding FPGA debugging with measurement cores
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2006-07-28 |
| When debugging an FPGA-based system, it can be very helpful to look at key signals inside the FPGA correlated with those in the rest of a system |
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| Understand FPGA/PCB co-design process
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2009-01-15 |
| The key in FPGA/PCB co-design is to consider connectivity as the foundation of the design process and implementation |
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| Achieving cost savings in FPGA-to-ASIC conversion
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2006-09-06 |
| Planning an FPGA-to-ASIC conversion requires that the ASIC vendor is involved as early as possible in order to achieve the best cost savings |
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| How to use register retiming to optimise your FPGA designs
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2005-12-14 |
| This article outlines recommended practices that show how to qualify an FPGA-based design for register retiming, along with specific examples for optimal performance results |
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| Tools, techniques, and methodology to a FPGA aid design
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2008-08-07 |
| Providing the ability to quickly understand the timing state of a design is crucial to the effectiveness of any FPGA design environment |
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| Power-Sensitive Design Techniques On FPGA Devices
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2001-07-03 |
| This paper focuses on the design techniques that need to be considered for power saving when considering FPGA devices |
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